Low-power motion vector estimation using iterative search block-matching methods and a high-speed non-destructive CMOS image sensor

2002 ◽  
Vol 12 (12) ◽  
pp. 1084-1092 ◽  
Author(s):  
S. Kawahito ◽  
D. Handoko ◽  
Y. Tadokoro ◽  
A. Matsuzawa
Keyword(s):  
Low Power ◽  
High Speed ◽  
Motion Vector ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Block Matching ◽  
Iterative Search ◽  
Matching Methods ◽  
Vector Estimation ◽  
Non Destructive

A CMOS Image Sensor with Non-Destructive High-Speed Imaging Mode and Its Applications

2000 ◽  
Vol 12 (5) ◽  
pp. 502-507
Author(s):  
Dwi Handoko ◽  
◽  
Shoji Kawahito ◽  
Minoru Kumahara ◽  
Nobuhiro Kawai ◽  
...  
Keyword(s):  
Video Compression ◽  
High Speed ◽  
Motion Vector ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Moving Object ◽  
High Speed Imaging ◽  
Imaging Mode ◽  
Vector Estimation ◽  
Non Destructive

This paper describes a CMOS image sensor with non-destructive high-speed imaging mode. The proposed sensor reads out high-speed intermediate images without destroying accumulated signal charge and captures video-rate (30 frame/s) images with high SNR. The application of the sensor to a low power motion vector estimation for video compression and high-fidelity imaging of moving object with tracking are also presented. Motion vector estimation using the proposed sensor is possible to reduce computational power by a factor of 1/10 compared to the full search algorithm. The simulation results show that the proposed image sensor with nondestructive high-speed imaging mode is useful for moving object imaging with less shape distortion.

scholarly journals Design of an Edge-Detection CMOS Image Sensor with Built-in Mask Circuits

Sensors ◽  
2020 ◽  
Vol 20 (13) ◽  
pp. 3649
Author(s):  
Minhyun Jin ◽  
Hyeonseob Noh ◽  
Minkyu Song ◽  
Soo Youn Kim
Keyword(s):  
Power Consumption ◽  
Edge Detection ◽  
Low Power ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Frame Rate ◽  
Oxide Semiconductor ◽  
Total Power ◽  
Total Power Consumption

In this paper, we propose a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) that has built-in mask circuits to selectively capture either edge-detection images or normal 8-bit images for low-power computer vision applications. To detect the edges of images in the CIS, neighboring column data are compared in in-column memories after column-parallel analog-to-digital conversion with the proposed mask. The proposed built-in mask circuits are implemented in the CIS without a complex image signal processer to obtain edge images with high speed and low power consumption. According to the measurement results, edge images were successfully obtained with a maximum frame rate of 60 fps. A prototype sensor with 1920 × 1440 resolution was fabricated with a 90-nm 1-poly 5-metal CIS process. The area of the 4-shared 4T-active pixel sensor was 1.4 × 1.4 µm2, and the chip size was 5.15 × 5.15 mm2. The total power consumption was 9.4 mW at 60 fps with supply voltages of 3.3 V (analog), 2.8 V (pixel), and 1.2 V (digital).

A low-power column-parallel ADC for high-speed CMOS image sensor

2013 ◽  
Author(s):  
Ye Han ◽  
Quanliang Li ◽  
Cong Shi ◽  
Liyuan Liu ◽  
Nanjian Wu
Keyword(s):  
Low Power ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor

A low power global shutter pixel with extended FD voltage swing range for large format high speed CMOS image sensor

2015 ◽  
Vol 58 (4) ◽  
pp. 1-10
Author(s):  
YangFan Zhou ◽  
ZhongXiang Cao ◽  
Ye Han ◽  
QuanLiang Li ◽  
Cong Shi ◽  
...  
Keyword(s):  
Low Power ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Large Format ◽  
Voltage Swing

scholarly journals Design of High Speed and Precision and Low-Power LVDS Driver for CMOS Image Sensor

2020 ◽  
Vol 38 (2) ◽  
pp. 442-450
Author(s):  
Chuangze Li ◽  
Benguang Han ◽  
Jie He ◽  
Longsheng Wu
Keyword(s):  
Low Power ◽  
High Frequency ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Compensation Method ◽  
Common Mode ◽  
General Design ◽  
Frequency Components ◽  
The Common

Aiming at the requirement of high speed and precision, low-power and large-capacity load of serial data interface for aerospace super large array(15k×15k) CMOS image sensor, a design scheme low voltage differential signal (LVDS) driver by combining the split-length method with the pre-emphasis technique is proposed. Firstly, comparing with the general design schemes, the present scheme uses the split-length compensation method to increase effectively the unity-gain bandwidth while keeping the op-amp gain constant. Secondly, the pre-emphasis technique is used to compensate the LVDS driver for high-frequency components to improve the driving capability of the capacitive load and high speed signal integrity (SI). The simulation results show that the accuracy of the common-mode feedback voltage is improved by using the split-length compensation method, and also the common-mode voltage changes below 15 mV. The pre-emphasis technique is used to enhance the amplitude of the high-frequency components lost during the high-speed transmission. The quality of the signal eye diagram during high-speed transmission reduces the bit error rate, and both the transmission rate and the driving load capacity are two times more than the general design (1.2 Gb/s@12 pF), and the quiescent current consumption is only 4.6 mA@12 pF. The present LVDS driver design is implemented in a typical CMOS process of 0.18 μm.

A low power dissipation high-speed CMOS image sensor with column-parallel sigma–delta ADCs

2015 ◽  
Vol 46 (9) ◽  
pp. 860-868 ◽  
Author(s):  
Yun-Tao Liu ◽  
Dong-Yang Xing ◽  
Ying Wang ◽  
Jie Chen
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Sigma Delta ◽  
Low Power Dissipation

scholarly journals On-CMOS Image Sensor Processing for Lane Detection

Sensors ◽  
2021 ◽  
Vol 21 (11) ◽  
pp. 3713
Author(s):  
Soyeon Lee ◽  
Bohyeok Jeong ◽  
Keunyeol Park ◽  
Minkyu Song ◽  
Soo Youn Kim
Keyword(s):  
Edge Detection ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Image Resolution ◽  
Lane Detection ◽  
Frame Rate ◽  
Total Power ◽  
Detection Accuracy ◽  
Total Power Consumption

This paper presents a CMOS image sensor (CIS) with built-in lane detection computing circuits for automotive applications. We propose on-CIS processing with an edge detection mask used in the readout circuit of the conventional CIS structure for high-speed lane detection. Furthermore, the edge detection mask can detect the edges of slanting lanes to improve accuracy. A prototype of the proposed CIS was fabricated using a 110 nm CIS process. It has an image resolution of 160 (H) × 120 (V) and a frame rate of 113, and it occupies an area of 5900 μm × 5240 μm. A comparison of its lane detection accuracy with that of existing edge detection algorithms shows that it achieves an acceptable accuracy. Moreover, the total power consumption of the proposed CIS is 9.7 mW at pixel, analog, and digital supply voltages of 3.3, 3.3, and 1.5 V, respectively.

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