Temperature-Aware DVFS for Hard Real-Time Applications on Multicore Processors

2012 ◽  
Vol 61 (10) ◽  
pp. 1484-1494 ◽  
Author(s):  
Vinay Hanumaiah ◽  
Sarma Vrudhula
Keyword(s):  
Real Time ◽  
Multicore Processors ◽  
Real Time Applications ◽  
Hard Real Time

Design of an Intelligent Data Cache with Replacement Policy

2019 ◽  
Vol 10 (2) ◽  
pp. 87-107
Author(s):  
B. Shameedha Begum ◽  
N. Ramasubramanian
Keyword(s):  
Real Time ◽  
Replacement Policy ◽  
Data Cache ◽  
Cache Performance ◽  
Performance Requirements ◽  
Novel Approach ◽  
Reconfigurable Caches ◽  
Real Time Applications ◽  
Hard Real Time ◽  
Replacement Algorithms

Embedded systems are designed for a variety of applications ranging from Hard Real Time applications to mobile computing, which demands various types of cache designs for better performance. Since real-time applications place stringent requirements on performance, the role of the cache subsystem assumes significance. Reconfigurable caches meet performance requirements under this context. Existing reconfigurable caches tend to use associativity and size for maximizing cache performance. This article proposes a novel approach of a reconfigurable and intelligent data cache (L1) based on replacement algorithms. An intelligent embedded data cache and a dynamic reconfigurable intelligent embedded data cache have been implemented using Verilog 2001 and tested for cache performance. Data collected by enabling the cache with two different replacement strategies have shown that the hit rate improves by 40% when compared to LRU and 21% when compared to MRU for sequential applications which will significantly improve performance of embedded real time application.

Implementing and using execution time clocks in Ada hard real-time applications

1998 ◽  
pp. 90-101 ◽  
Author(s):  
M. González Harbour ◽  
M. Aldea Rivas ◽  
J. J. Gutiérrez García ◽  
J. C. Palencia Gutiérrez
Keyword(s):  
Real Time ◽  
Execution Time ◽  
Real Time Applications ◽  
Hard Real Time

scholarly journals Quantitative Characterization of Event Streams in Analysis of Hard Real-Time Applications

2005 ◽  
Vol 29 (2-3) ◽  
pp. 205-225 ◽  
Author(s):  
Ernesto Wandeler ◽  
Alexander Maxiaguine ◽  
Lothar Thiele
Keyword(s):  
Real Time ◽  
Quantitative Characterization ◽  
Real Time Applications ◽  
Hard Real Time

Synchronization Analysis for Hard Real-Time Multicore Systems

2012 ◽  
Vol 241-244 ◽  
pp. 2246-2252
Author(s):  
Mao Lin Yang ◽  
Hang Lei ◽  
Yong Liao ◽  
Lin Hui Hu
Keyword(s):  
Real Time ◽  
Multicore Processors ◽  
Real Time Systems ◽  
Response Time Analysis ◽  
Time Analysis ◽  
Priority Inversion ◽  
Simulation Results ◽  
Hard Real Time ◽  
Local Interference ◽  
Time Systems

Multicore processors are increasingly used in real-time embedded systems. Better utilization of hard real-time systems requires accurate scheduling and synchronization analysis. In this paper, we characterize the major synchronization penalties arising from partitioned fixed priority scheduling for hard real-time tasks on multicore platform, including transitive remote preemption, multiple remote blocking, and multiple priority inversions. Subsequently, we propose a new response time analysis by improving the approach to bound task blocking time. The key idea of this approach is to classify the total blocking time into (i) direct blocking, including local and remote blocking, and transitive remote preemption; and (ii) multiple local interference which is incurred by multiple priority inversion. Simulation results indicate that the proposed approach produces less pessimistic results in task blocking time, and better schedulability performance.

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