Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m)

Che Wun Chiou; Chin-Cheng Chang; Chiou-Yng Lee; Ting-Wei Hou; Jim-Min Lin

doi:10.1109/tc.2008.226

Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m)

IEEE Transactions on Computers ◽

10.1109/tc.2008.226 ◽

2009 ◽

Vol 58 (6) ◽

pp. 851-857 ◽

Cited By ~ 25

Author(s):

Che Wun Chiou ◽

Chin-Cheng Chang ◽

Chiou-Yng Lee ◽

Ting-Wei Hou ◽

Jim-Min Lin

Keyword(s):

Error Detection ◽

Normal Basis ◽

Concurrent Error Detection ◽

Error Detection And Correction ◽

Gaussian Normal Basis

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Concurrent Error Detection Architectures for Field Multiplication Using Gaussian Normal Basis

Information Security, Practice and Experience - Lecture Notes in Computer Science ◽

10.1007/978-3-642-12827-1_8 ◽

2010 ◽

pp. 96-109

Author(s):

Zhen Wang ◽

Xiaozhe Wang ◽

Shuqin Fan

Keyword(s):

Error Detection ◽

Normal Basis ◽

Concurrent Error Detection ◽

Gaussian Normal Basis ◽

Field Multiplication

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Concurrent error detection architectures for Gaussian normal basis multiplication over GF(2 )

Integration ◽

10.1016/j.vlsi.2009.07.002 ◽

2010 ◽

Vol 43 (1) ◽

pp. 113-123 ◽

Cited By ~ 13

Author(s):

Chiou-Yng Lee

Keyword(s):

Error Detection ◽

Normal Basis ◽

Concurrent Error Detection ◽

Gaussian Normal Basis

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Concurrent Error Detection in Multiplexer-Based Multipliers for Normal Basis of GF(2 m ) Using Double Parity Prediction Scheme

Journal of Signal Processing Systems ◽

10.1007/s11265-009-0361-4 ◽

2009 ◽

Vol 58 (2) ◽

pp. 233-246 ◽

Cited By ~ 4

Author(s):

Chiou-Yng Lee ◽

Che Wun Chiou ◽

Jim-Min Lin

Keyword(s):

Error Detection ◽

Normal Basis ◽

Concurrent Error Detection ◽

Prediction Scheme

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Concurrent Error Detection in Bit-Serial Normal Basis Multiplication Over ${\rm GF}(2^{m})$ Using Multiple Parity Prediction Schemes

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2009.2020593 ◽

2010 ◽

Vol 18 (8) ◽

pp. 1234-1238 ◽

Cited By ~ 11

Author(s):

Chiou-Yng Lee ◽

Pramod Kumar Meher ◽

Jagdish Chandra Patra

Keyword(s):

Error Detection ◽

Normal Basis ◽

Concurrent Error Detection ◽

Bit Serial

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Design of Memories with Concurrent Error Detection and Correction by Nonlinear SEC-DED Codes

Journal of Electronic Testing ◽

10.1007/s10836-010-5168-5 ◽

2010 ◽

Vol 26 (5) ◽

pp. 559-580 ◽

Cited By ~ 30

Author(s):

Zhen Wang ◽

Mark Karpovsky ◽

Konrad J. Kulikowski

Keyword(s):

Error Detection ◽

Concurrent Error Detection ◽

Error Detection And Correction

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Concurrent error detection and correction in dual basis multiplier over GF(2m)

IET Circuits Devices & Systems ◽

10.1049/iet-cds:20080122 ◽

2009 ◽

Vol 3 (1) ◽

pp. 22-40 ◽

Cited By ~ 8

Author(s):

C.W. Chiou ◽

C.-C. Chang ◽

T.-W. Hou ◽

J.-M. Lin ◽

C.-Y. Lee

Keyword(s):

Error Detection ◽

Concurrent Error Detection ◽

Dual Basis ◽

Error Detection And Correction

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Area efficient concurrent error detection and correction for parallel filters

Electronics Letters ◽

10.1049/el.2012.2237 ◽

2012 ◽

Vol 48 (20) ◽

pp. 1258 ◽

Cited By ~ 8

Author(s):

P. Reviriego ◽

S. Pontarelli ◽

C.J. Bleakley ◽

J.A. Maestro

Keyword(s):

Error Detection ◽

Concurrent Error Detection ◽

Error Detection And Correction ◽

Area Efficient

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A CONCURRENT ERROR DETECTION AND CORRECTION BASED FAULT-TOLERANT XOR-XNOR CIRCUIT FOR HIGHLY RELIABLE APPLICATIONS

IAENG Transactions on Electrical Engineering Volume 1 ◽

10.1142/9789814439084_0005 ◽

2013 ◽

pp. 56-69

Author(s):

MOUNA KARMANI ◽

CHIRAZ KHEDHIRI ◽

BELGACEM HAMDI ◽

KA LOK MAN ◽

ENG GEE LIM ◽

...

Keyword(s):

Error Detection ◽

Fault Tolerant ◽

Concurrent Error Detection ◽

Error Detection And Correction

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Non-concurrent error detection and correction in discrete-time LTI dynamic systems

Proceedings of the 40th IEEE Conference on Decision and Control (Cat. No.01CH37228) ◽

10.1109/cdc.2001.981183 ◽

2003 ◽

Cited By ~ 7

Author(s):

C.N. Hadjicostis

Keyword(s):

Discrete Time ◽

Dynamic Systems ◽

Error Detection ◽

Concurrent Error Detection ◽

Error Detection And Correction

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Implementation of 32-bit RISC processor incorporating hardware concurrent error detection and correction

IEE Proceedings E Computers and Digital Techniques ◽

10.1049/ip-e.1990.0009 ◽

1990 ◽

Vol 137 (1) ◽

pp. 88 ◽

Cited By ~ 11

Author(s):

I.D. Elliott ◽

I.L. Sayers

Keyword(s):

Error Detection ◽

Concurrent Error Detection ◽

Risc Processor ◽

Error Detection And Correction

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