scholarly journals Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors

2005 ◽  
Vol 54 (6) ◽  
pp. 672-683 ◽  
Author(s):  
M. Jayapala ◽  
F. Barat ◽  
T.V. Aa ◽  
F. Catthoor ◽  
H. Corporaal ◽  
...  
Keyword(s):  
Low Energy ◽  
Embedded Processors ◽  
Loop Buffer

Instruction Buffering Exploration for Low Energy Embedded Processors

2003 ◽  
pp. 409-419 ◽  
Author(s):  
Tom Vander Aa ◽  
Murali Jayapala ◽  
Francisco Barat ◽  
Geert Deconinck ◽  
Rudy Lauwereins ◽  
...  
Keyword(s):  
Low Energy ◽  
Embedded Processors

Low Energy On-Line SBST of Embedded Processors

2008 ◽  
Author(s):  
A. Merentitis ◽  
N. Kranitis ◽  
A. Paschalis ◽  
D. Gizopoulos
Keyword(s):  
Low Energy ◽  
Embedded Processors ◽  
On Line

Low Energy Online Self-Test of Embedded Processors in Dependable WSN Nodes

2012 ◽  
Vol 9 (1) ◽  
pp. 86-100 ◽  
Author(s):  
A. Merentitis ◽  
N. Kranitis ◽  
A. Paschalis ◽  
D. Gizopoulos
Keyword(s):  
Low Energy ◽  
Embedded Processors ◽  
Self Test

A specialized low-cost vectorized loop buffer for embedded processors

2011 ◽  
Author(s):  
Libo Huang ◽  
Zhiying Wang ◽  
Li Shen ◽  
Hongyi Lu ◽  
Nong Xiao ◽  
...  
Keyword(s):  
Low Cost ◽  
Embedded Processors ◽  
Loop Buffer

Systematic architecture exploration based on optimistic cycle estimation for low energy embedded processors

2009 ◽  
Author(s):  
Ittetsu Taniguchi ◽  
Murali Jayapala ◽  
Praveen Raghavan ◽  
Francky Catthoor ◽  
Keishi Sakanushi ◽  
...  
Keyword(s):  
Low Energy ◽  
Embedded Processors ◽  
Architecture Exploration

Dissociated Σ=27 boundaries in silicon

1988 ◽  
Vol 46 ◽  
pp. 624-625
Author(s):  
A. Garg ◽  
W.A.T. Clark ◽  
J.P. Hirth
Keyword(s):  
Electron Diffraction ◽  
Local Minimum ◽  
Boundary Energy ◽  
Coincidence Site Lattice ◽  
Boundary Plane ◽  
Low Energy ◽  
Theoretical Understanding ◽  
Site Lattice ◽  
Kikuchi Pattern ◽  
Analysis Techniques

In the last twenty years, a significant amount of work has been done in the theoretical understanding of grain boundaries. The various proposed grain boundary models suggest the existence of coincidence site lattice (CSL) boundaries at specific misorientations where a periodic structure representing a local minimum of energy exists between the two crystals. In general, the boundary energy depends not only upon the density of CSL sites but also upon the boundary plane, so that different facets of the same boundary have different energy. Here we describe TEM observations of the dissociation of a Σ=27 boundary in silicon in order to reduce its surface energy and attain a low energy configuration.The boundary was identified as near CSL Σ=27 {255} having a misorientation of (38.7±0.2)°/[011] by standard Kikuchi pattern, electron diffraction and trace analysis techniques. Although the boundary appeared planar, in the TEM it was found to be dissociated in some regions into a Σ=3 {111} and a Σ=9 {122} boundary, as shown in Fig. 1.

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