A self control strategy for a delta inverter fed BDCM drive using Xilinx system generator with fixed point/floating point mode

This paper presents an automated tool for floating-point to fixed-point conversion. The tool is based on previous work that was built in MATLAB/Simulink environment and Xilinx System Generator support. The tool is now extended to include Synplify DSP blocksets in a seamless way from the users' view point. In addition to FPGA area estimation, the tool now also includes ASIC area estimation for end-users who choose the ASIC flow. The tool minimizes hardware cost subject to mean-squared quantization error (MSE) constraints. To obtain more accurate ASIC area estimations with synthesized results, 3 performance levels are available to choose from, suitable for high-performance, typical, or low-power applications. The use of the tool is first illustrated on an FIR filter to achieve over 50% area savings for MSE specification of 10−6 as compared to all 16-bit realization. More complex optimization results for chip-level designs are also demonstrated.

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An effective self-control strategy for the reduction of aflatoxin M1 content in milk and to decrease the exposure of consumers

Food Additives & Contaminants Part A ◽

10.1080/19440049.2016.1241895 ◽

2016 ◽

Vol 33 (12) ◽

pp. 1840-1849 ◽

Cited By ~ 3

Author(s):

Kata Kerekes ◽

Paolo Bonilauri ◽

Andrea Serraino ◽

Federica Giacometti ◽

Silvia Piva ◽

...

Keyword(s):

Control Strategy ◽

Self Control ◽

Aflatoxin M1

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Implementation of Image Denoising with Reversible Multipliers using Xilinx System Generator

Journal of Xidian University ◽

10.37896/jxu15.4/023 ◽

2021 ◽

Vol 15 (4) ◽

Keyword(s):

Image Denoising ◽

System Generator ◽

Xilinx System Generator

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A Guide on Using Xilinx System Generator to Design and Implement Real-Time Audio Effects on FPGA

International Journal of Future Computer and Communication ◽

10.18178/ijfcc.2021.10.3.577 ◽

2021 ◽

pp. 38-44

Author(s):

L. Merah ◽

◽

P. Lorenz ◽

A. Ali-Pacha ◽

N. Hadj-Said ◽

...

Keyword(s):

Real Time ◽

Power Efficiency ◽

Audio Signal ◽

Research Area ◽

Audio Processing ◽

The Real ◽

System Generator ◽

Xilinx System Generator ◽

Active Research ◽

Implementation Steps

The enormous progress in communication technology has led to a tremendous need to provide an ideal environment for the transmission, storing, and processing of digital multimedia content, where the audio signal takes the lion's share of it. Audio processing covers many diverse fields, its main aim is presenting sound to human listeners. Recently, digital audio processing became an active research area, it covers everything from theory to practice in relation to transmission, compression, filtering, and adding special effects to an audio signal. The aim of this work is to present the real-time implementation steps of some audio effects namely, the echo and Flanger effects on Field Programmable Gate Array (FPGA). Today, FPGAs are the best choice in data processing because they provide more flexibility, performance, and huge processing capabilities with great power efficiency. Designs are achieved using the XSG tool (Xilinx System Generator), which makes complex designs easier without prior knowledge of hardware description languages. The paper is presented as a guide with deep technical details about designing and real-time implementation steps. We decided to transfer some experience to designers who want to rapidly prototype their ideas using tools such as XSG. All the designs have been simulated and verified under Simulink/Matlab environment, then exported to Xilinx ISE (Integrated Synthesis Environment) tool for the rest of the implementation steps. The paper also gives an idea of interfacing the FPGA with the LM4550 AC’97 codec using VHDL coding. The ATLYS development board based on Xilinx Spartan-6 LX45 FPGA is used for the real-time implementation.

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