An Automated Detection Method of Solder Joint Defects Using 3D Computed Tomography for IC Package Inspection

2011 ◽  
Author(s):  
Junhyuk Yoon ◽  
Jeongjin Lee ◽  
Bohyoung Kim ◽  
Yeong Gil Shin
Keyword(s):  
Computed Tomography ◽  
Solder Joint ◽  
Detection Method ◽  
Automated Detection ◽  
3D Computed Tomography ◽  
Ic Package ◽  
Ic Package Inspection

scholarly journals Crack Detection Method Applied to 3D Computed Tomography Images of Baked Carbon Anodes

Metals ◽  
2016 ◽  
Vol 6 (11) ◽  
pp. 272 ◽  
Author(s):  
Donald Picard ◽  
Julien Lauzon-Gauthier ◽  
Carl Duchesne ◽  
Houshang Alamdari ◽  
Mario Fafard ◽  
...  
Keyword(s):  
Computed Tomography ◽  
Crack Detection ◽  
Detection Method ◽  
3D Computed Tomography ◽  
Computed Tomography Images ◽  
Carbon Anodes

Acoustic microscopy techniques for the inspection of integrated circuit devices and packages

1992 ◽  
Vol 50 (2) ◽  
pp. 966-967
Author(s):  
Thomas M. Moore
Keyword(s):  
Integrated Circuit ◽  
Acoustic Microscopy ◽  
Hybrid Technique ◽  
Frequency Scanning ◽  
Ic Packaging ◽  
Ic Package ◽  
Microscopy Techniques ◽  
Ic Package Inspection ◽  
Pulse Echo ◽  
Scanning Acoustic Microscope

In the last decade, a variety of characterization techniques based on acoustic phenomena have come into widespread use. Characteristics of matter waves such as their ability to penetrate optically opaque solids and produce image contrast based on acoustic impedance differences have made these techniques attractive to semiconductor and integrated circuit (IC) packaging researchers.These techniques can be divided into two groups. The first group includes techniques primarily applied to IC package inspection which take advantage of the ability of ultrasound to penetrate deeply and nondestructively through optically opaque solids. C-mode Acoustic Microscopy (C-AM) is a recently developed hybrid technique which combines the narrow-band pulse-echo piezotransducers of conventional C-scan recording with the precision scanning and sophisticated signal analysis capabilities normally associated with the high frequency Scanning Acoustic Microscope (SAM). A single piezotransducer is scanned over the sample and both transmits acoustic pulses into the sample and receives acoustic echo signals from the sample.

scholarly journals Aneurysm Arising at the Origin of a Duplicated Middle Cerebral Artery

2021 ◽  
pp. 446-450
Author(s):  
Jean Roch Alliez ◽  
Luis Manera
Keyword(s):  
Computed Tomography ◽  
Subarachnoid Haemorrhage ◽  
Middle Cerebral Artery ◽  
Cerebral Artery ◽  
World Federation ◽  
Treatment Procedure ◽  
3D Computed Tomography ◽  
Ruptured Aneurysms ◽  
Tomography Reconstruction ◽  
Computed Tomography Reconstruction

A duplicated middle cerebral artery (DMCA) is a common anomaly. However, aneurysms arising from the origin of a DMCA are extremely rare. A 22-year-old female was admitted to our hospital with a World Federation of Neurosurgical Societies grade 2 subarachnoid haemorrhage. Four-vessel angiography revealed a DMCA and an aneurysm arising from the origin of this artery. The aneurysm was successfully treated by embolization, and the patient was discharged 2 weeks later. Ruptured aneurysms arising from the origin of a DMCA can be successfully treated by embolization. These aneurysms are small and 3D-computed tomography reconstruction is mandatory to detect them. It is important to preserve the DMCA during the treatment procedure.

Elevated Stand-Off Heights in Solder Joint Interconnections of Surface Mounted IC Packages Result in Appreciable Stress and Warpage Relief

2018 ◽  
Vol 2018 (1) ◽  
pp. 000534-000542
Author(s):  
Ephraim Suhir ◽  
Sung Yi ◽  
Jennie S. Hwang ◽  
R. Ghaffarian
Keyword(s):  
Solder Joint ◽  
Solder Joints ◽  
Calculated Data ◽  
Ball Grid Array ◽  
Substantial Improvement ◽  
Stress Model ◽  
Solder Material ◽  
The Difference ◽  
Free Solder ◽  
Ic Package

Abstract The “head-in-pillow” (HnP) defects in lead-free solder joint interconnections of IC packages with conventional (small) stand-off heights of the solder joints, and particularly in packages with fine pitches, are attributed by many electronic material scientists to the three major causes: 1) attributes of the manufacturing process, 2) solder material properties and 3)design-related issues. The latter are thought to be caused primarily by elevated stresses in the solder material, as well as by the excessive warpage of the PCB-package assembly and particularly to the differences in the thermally induced curvatures of the PCB and the package. In this analysis the stress-and-warpage issue is addressed using an analytical predictive stress model. This model is a modification and an extension of the model developed back in 1980-s by the first author. It is assumed that it is the difference in the post-fabrication deflections of the PCB-package assembly that is the root cause of the solder materials failures and particularly and perhaps the HnP defects. The calculated data based on the developed analytical thermal stress model suggest that the replacement of the conventional ball-grid-array (BGA) designs with designs characterized by elevated stand-off heights of the solder joints could result in significant stress and warpage relief and, hopefully, in a lower propensity of the IC package to HnP defects as well. The general concepts are illustrated by a numerical example, in which the responses to the change in temperature of a conventional design referred to as ball-grid-array (BGA) and a design with solder joints with elevated stand-off heights referred to as column-grid-array (CGA) are compared. The computed data indicated that the effective stress in the solder material is relieved by about 40% and the difference between the maximum deflections of the PCB and the package is reduced by about 60%, when the BGA design is replaced by a CGA system. Although no proof that the use of solder joints with elevated stand-off heights will lessen the package propensity to the HnP defects is provided, the authors think that there is a reason to believe that the application of solder joints with elevated stand-off heights could result in a substantial improvement in the general IC package performance, including, perhaps, its propensity to HnP defects.

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