Design and implementation of high performance CMOS-MEMS capacitive sensors

2009 ◽  
Author(s):  
Ming-Han Tsai ◽  
Chih-Ming Sun ◽  
Yu-Chia Liu ◽  
Chuanwei Wang ◽  
Weileun Fang
Keyword(s):  
High Performance ◽  
Capacitive Sensors ◽  
Design And Implementation ◽  
Cmos Mems

scholarly journals Toward High Throughput Core-CBCM CMOS Capacitive Sensors for Life Science Applications: A Novel Current-Mode for High Dynamic Range Circuitry

Sensors ◽  
2018 ◽  
Vol 18 (10) ◽  
pp. 3370 ◽  
Author(s):  
Saghi Forouhi ◽  
Rasoul Dehghani ◽  
Ebrahim Ghafar-Zadeh
Keyword(s):  
High Performance ◽  
Life Science ◽  
Dynamic Range ◽  
Current Mode ◽  
Capacitive Sensor ◽  
Oxide Semiconductor ◽  
Capacitance Measurement ◽  
Biological Research ◽  
Cmos Process ◽  
Capacitive Sensors

This paper proposes a novel charge-based Complementary Metal Oxide Semiconductor (CMOS) capacitive sensor for life science applications. Charge-based capacitance measurement (CBCM) has significantly attracted the attention of researchers for the design and implementation of high-precision CMOS capacitive biosensors. A conventional core-CBCM capacitive sensor consists of a capacitance-to-voltage converter (CVC), followed by a voltage-to-digital converter. In spite of their high accuracy and low complexity, their input dynamic range (IDR) limits the advantages of core-CBCM capacitive sensors for most biological applications, including cellular monitoring. In this paper, after a brief review of core-CBCM capacitive sensors, we address this challenge by proposing a new current-mode core-CBCM design. In this design, we combine CBCM and current-controlled oscillator (CCO) structures to improve the IDR of the capacitive readout circuit. Using a 0.18 μm CMOS process, we demonstrate and discuss the Cadence simulation results to demonstrate the high performance of the proposed circuitry. Based on these results, the proposed circuit offers an IDR ranging from 873 aF to 70 fF with a resolution of about 10 aF. This CMOS capacitive sensor with such a wide IDR can be employed for monitoring cellular and molecular activities that are suitable for biological research and clinical purposes.

scholarly journals Design and implementation of CNTFET based ternary 1x1 memories

2019 ◽  
Vol 8 (3) ◽  
pp. 175 ◽  
Author(s):  
S.Tamil Selvan ◽  
M. Sundararajan
Keyword(s):  
High Performance ◽  
Data Access ◽  
Cmos Technology ◽  
Access Time ◽  
The Novel ◽  
Design And Implementation ◽  
Technology Process ◽  
Sram Cell ◽  
And Performance ◽  
Power Application

In this paper presented Design and implementation of CNTFET based Ternary 1x1 RAM memories high-performance digital circuits. CNTFET Ternary 1x1 SRAM memories is implement using 32nm technology process. The CNTFET decresase the diameter and performance matrics like delay,power and power delay, The CNTFET Ternary 6T SRAM cell consists of two cross coupled Ternary inverters one is READ and another WRITE operations of the Ternary 6T SRAM cell are performed with the Tritline using HSPICE and Tanner tools in this tool is performed high accuracy. The novel based work can be used for Low Power Application and Access time is less of compared to the conventional CMOS Technology. The CNTFET Ternary 6T SRAM array module (1X1) in 32nm technology consumes only 0.412mW power and data access time is about 5.23ns.

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