Implementation of Multi-channel Modern and Multi-channel Radio Broadcast Receiver on Reconfigurable Packet Routing-oriented Signal Processing Platform (RPPP)

2006 ◽  
Author(s):  
Akihisa Yokoyama ◽  
Takashi Matsumura ◽  
Hiroshi Harada
Keyword(s):  
Signal Processing ◽  
Packet Routing ◽  
Radio Broadcast ◽  
Processing Platform

Design of On-orbit Software Reconfiguration for a General Signal Processing Platform Based on SOC Chip

2021 ◽  
Author(s):  
Shengming Liang ◽  
Kang Wang ◽  
Haiyuan Wang ◽  
Ruichen Wang ◽  
Rui Guo
Keyword(s):  
Signal Processing ◽  
Software Reconfiguration ◽  
Processing Platform

Parallel Programming and Its Architectures Based on Data Access Separated Algorithm Kernels

2012 ◽  
pp. 278-296
Author(s):  
Dake Liu ◽  
Joar Sohl ◽  
Jian Wang
Keyword(s):  
Signal Processing ◽  
Parallel Programming ◽  
High Performance ◽  
Data Access ◽  
Time Signal ◽  
Hardware System ◽  
Memory Subsystem ◽  
Computing Performance ◽  
Processing Platform ◽  
Parallel Signal Processing

A novel master-multi-SIMD architecture and its kernel (template) based parallel programming flow is introduced as a parallel signal processing platform. The name of the platform is ePUMA (embedded Parallel DSP processor architecture with Unique Memory Access). The essential technology is to separate data accessing kernels from arithmetic computing kernels so that the run-time cost of data access can be minimized by running it in parallel with algorithm computing. The SIMD memory subsystem architecture based on the proposed flow dramatically improves the total computing performance. The hardware system and programming flow introduced in this article will primarily aim at low-power high-performance embedded parallel computing with low silicon cost for communications and similar real-time signal processing.

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