High-k dielectric polycrystallization effects on the nanoscale electrical properties of MOS structures

Author(s):  
A. Bayerl ◽  
V. Iglesias ◽  
M. Lanza ◽  
M. Porti ◽  
M. Nafria ◽  
...  
2007 ◽  
Vol 134 ◽  
pp. 379-382
Author(s):  
Claire Therese Richard ◽  
D. Benoit ◽  
S. Cremer ◽  
L. Dubost ◽  
B. Iteprat ◽  
...  

3D architecture is an alternative way to high-k dielectric to increase the capacitance of MIM structure. However, the top of this kind of structure is very sensitive to defectivity and then requires a special wet treatment. In this paper, we present the process flow for a 3D MIM integration in a CMOS copper back-end and a two steps wet process which provides very good electrical performances, i.e. leakage current lower than 10-9A.cm-2 at 5V / 125°C and breakdown voltage higher than 20V. At first, a SC1 step is done for electrode isolation improvement by material etching with good selectivity towards dielectric: that’s the electrode recess. In the second time, a HF step is done for copper oxide dilution and residues removal from the top of the 3D structure.


2008 ◽  
Vol 92 (11) ◽  
pp. 113501 ◽  
Author(s):  
Dina H. Triyoso ◽  
Greg Spencer ◽  
Rama I. Hegde ◽  
Rich Gregory ◽  
Xiang-Dong Wang

2008 ◽  
Vol 608 ◽  
pp. 55-109 ◽  
Author(s):  
Jaroslaw Dąbrowski ◽  
Seiichi Miyazaki ◽  
S. Inumiya ◽  
G. Kozłowski ◽  
G. Lippert ◽  
...  

Electrical properties of thin high-k dielectric films are influenced (or even governed) by the presence of macroscopic, microscopic and atomic-size defects. For most applications, a structurally perfect dielectric material with moderate parameters would have sufficiently low leakage and sufficiently long lifetime. But defects open new paths for carrier transport, increasing the currents by orders of magnitude, causing instabilities due to charge trapping, and promoting the formation of defects responsible for electrical breakdown events and for the failure of the film. We discuss how currents flow across the gate stack and how damage is created in the material. We also illustrate the contemporary basic knowledge on hazardous defects (including certain impurities) in high-k dielectrics using the example of a family of materials based on Pr oxides. As an example of the influence of stoichiometry on the electrical pa-rameters of the dielectric, we analyze the effect of nitrogen incorporation into ultrathin Hf silicate films.


2006 ◽  
Vol 917 ◽  
Author(s):  
Karol Frohlich ◽  
Juan Pedro Espinos ◽  
Andrej Vincze ◽  
Milan Tapajna ◽  
Kristina Husekova

AbstractWe have investigated advanced MOS structures containing Ru gate electrode, HfxSi1-xOy dielectric film and Si substrate. The Ru gate electrode was grown by MOCVD at 300 °C. The MOS structures were annealed for 30 min in forming gas and nitrogen at temperatures up to 550 °C. Capacitance-voltage measurements showed important shift of the flat band voltage of the Ru/ HfxSi1-xOy/Si gate stack after treatment at 550 °C. X-ray photoemission spectroscopy (XPS), ultraviolet photoemission spectroscopy (UPS), reflection electron energy loss spectroscopy (REELS) and secondary ion mass spectroscopy (SIMS) were used to analyze interface between ruthenium and high-k dielectric film. Based on the analysis we were able to build up energy-band alignement for the Ru/ HfxSi1-xOy interface. We observed that the energy-band structure of the Ru/HfxSi1-xOy interface remains stable upon annealing in forming gas up to 550 °C. Presence of hydrogen revealed by SIMS can account for compensation of negative charges in HfxSi1-xOy during thermal treatment.


Vacuum ◽  
2012 ◽  
Vol 86 (6) ◽  
pp. 714-717 ◽  
Author(s):  
P. Benko ◽  
A. Vincze ◽  
L. Harmatha ◽  
I. Novotný ◽  
V. Řeháček

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