Combining Prefetch with Instruction Cache Locking in Multitasking Real-Time Systems

2010 IEEE 16th International Conference on Embedded and Real-Time Computing Systems and Applications ◽

10.1109/rtcsa.2010.8 ◽

2010 ◽

Cited By ~ 10

Author(s):

Luis C. Aparicio ◽

Juan Segarra ◽

Clemente Rodriguez ◽

Victor Vinals

Keyword(s):

Real Time ◽

Real Time Systems ◽

Instruction Cache ◽

Cache Locking ◽

Time Systems

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Combining watchdog processor with instruction cache locking for a fault-tolerant, predictable architecture applied to fixed-priority, preemptive, multitasking real-time systems

2019 24th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA) ◽

10.1109/etfa.2019.8869168 ◽

2019 ◽

Author(s):

Antonio Marti-Campoy ◽

Francisco Rodriguez-Ballester

Keyword(s):

Real Time ◽

Fault Tolerant ◽

Real Time Systems ◽

Fixed Priority ◽

Instruction Cache ◽

Cache Locking ◽

Time Systems

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Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache

10th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC'07) ◽

10.1109/isorc.2007.56 ◽

2007 ◽

Cited By ~ 2

Author(s):

Raimund Kirner ◽

Peter Puschner

Keyword(s):

Real Time ◽

Real Time Systems ◽

Instruction Cache ◽

Time Systems

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Using Dynamic, Full Cache Locking and Genetic Algorithms for Cache Size Minimization in Multitasking, Preemptive, Real-Time Systems

Theory and Practice of Natural Computing - Lecture Notes in Computer Science ◽

10.1007/978-3-642-45008-2_13 ◽

2013 ◽

pp. 157-168

Author(s):

Antonio Martí Campoy ◽

Francisco Rodríguez-Ballester ◽

Rafael Ors Carot

Keyword(s):

Genetic Algorithms ◽

Real Time ◽

Real Time Systems ◽

Cache Size ◽

Cache Locking ◽

Time Systems

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Adding instruction cache effect to an exact schedulability analysis of preemptive real-time systems

Proceedings of the Eighth Euromicro Workshop on Real-Time Systems ◽

10.1109/emwrts.1996.557940 ◽

2002 ◽

Cited By ~ 19

Author(s):

J.V. Busquets-Mataix ◽

J.J. Serrano-Martin ◽

R. Ors-Carot ◽

P. Gil ◽

A. Wellings

Keyword(s):

Real Time ◽

Schedulability Analysis ◽

Real Time Systems ◽

Instruction Cache ◽

Time Systems

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Hybrid instruction cache partitioning for preemptive real-time systems

Proceedings Ninth Euromicro Workshop on Real Time Systems ◽

10.1109/emwrts.1997.613764 ◽

2002 ◽

Cited By ~ 10

Author(s):

J.V. Busquets-Mataix ◽

J.J. Serrano ◽

A. Wellings

Keyword(s):

Real Time ◽

Real Time Systems ◽

Hybrid Instruction ◽

Cache Partitioning ◽

Instruction Cache ◽

Time Systems

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Low-complexity algorithms for static cache locking in multitasking hard real-time systems

23rd IEEE Real-Time Systems Symposium, 2002. RTSS 2002. ◽

10.1109/real.2002.1181567 ◽

2003 ◽

Cited By ~ 54

Author(s):

I. Puaut ◽

D. Decotigny

Keyword(s):

Real Time ◽

Low Complexity ◽

Real Time Systems ◽

Cache Locking ◽

Hard Real Time ◽

Time Systems

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Instruction Cache in Hard Real-Time Systems: Modeling and Integration in Scheduling Analysis Tools with AADL

2014 12th IEEE International Conference on Embedded and Ubiquitous Computing ◽

10.1109/euc.2014.24 ◽

2014 ◽

Cited By ~ 2

Author(s):

Hai Nam Tran ◽

Frank Singhoff ◽

Stephane Rubini ◽

Jalil Boukhobza

Keyword(s):

Real Time ◽

Systems Modeling ◽

Real Time Systems ◽

Instruction Cache ◽

Scheduling Analysis ◽

Analysis Tools ◽

Hard Real Time ◽

Time Systems

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Improving the WCET computation in the presence of a lockable instruction cache in multitasking real-time systems

Journal of Systems Architecture ◽

10.1016/j.sysarc.2010.08.008 ◽

2011 ◽

Vol 57 (7) ◽

pp. 695-706 ◽

Cited By ~ 19

Author(s):

Luis C. Aparicio ◽

Juan Segarra ◽

Clemente Rodríguez ◽

Víctor Viñals

Keyword(s):

Real Time ◽

Real Time Systems ◽

Instruction Cache ◽

Time Systems

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Combining Instruction Prefetching with Partial Cache Locking to Improve WCET in Real-Time Systems

PLoS ONE ◽

10.1371/journal.pone.0082975 ◽

2013 ◽

Vol 8 (12) ◽

pp. e82975 ◽

Cited By ~ 4

Author(s):

Fan Ni ◽

Xiang Long ◽

Han Wan ◽

Xiaopeng Gao

Keyword(s):

Real Time ◽

Real Time Systems ◽

Instruction Prefetching ◽

Cache Locking ◽

Time Systems

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Integrated instruction cache analysis and locking in multitasking real-time systems

Proceedings of the 50th Annual Design Automation Conference on - DAC '13 ◽

10.1145/2463209.2488916 ◽

2013 ◽

Cited By ~ 6

Author(s):

Huping Ding ◽

Yun Liang ◽

Tulika Mitra

Keyword(s):

Real Time ◽

Real Time Systems ◽

Integrated Instruction ◽

Instruction Cache ◽

Cache Analysis ◽

Time Systems

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