The impact of extrinsic cache performance on predictability of real-time systems

2002 ◽  
Author(s):  
J.V. Busquets-Mataix ◽  
J.J. Serrano-Martin
Keyword(s):  
Real Time ◽  
Real Time Systems ◽  
Cache Performance ◽  
Time Systems ◽  
The Impact

scholarly journals Linux Low-Latency Tracing for Multicore Hard Real-Time Systems

2015 ◽  
Vol 2015 ◽  
pp. 1-8 ◽  
Author(s):  
Raphaël Beamonte ◽  
Michel R. Dagenais
Keyword(s):  
Real Time ◽  
Analysis Tool ◽  
Time Behavior ◽  
Real Time Systems ◽  
Real Time System ◽  
The Real ◽  
Real Time Analysis ◽  
Hard Real Time ◽  
Time Systems ◽  
The Impact

Real-time systems have always been difficult to monitor and debug because of the timing constraints which rule out any tool significantly impacting the system latency and performance. Tracing is often the most reliable tool available for studying real-time systems. The real-time behavior of Linux systems has improved recently and it is possible to have latencies in the low microsecond range. Therefore, tracers must ensure that their overhead is within that range and predictable and scales well to multiple cores. The LTTng 2.0 tools have been optimized for multicore performance, scalability, and flexibility. We used and extended the real-time verification tool rteval to study the impact of LTTng on the maximum latency on hard real-time applications. We introduced a new real-time analysis tool to establish the baseline of real-time system performance and then to measure the impact added by tracing the kernel and userspace (UST) with LTTng. We then identified latency problems and accordingly modified LTTng-UST and the procedure to isolate the shielded real-time cores from the RCU interprocess synchronization routines. This work resulted in extended tools to measure the real-time properties of multicore Linux systems, a characterization of the impact of LTTng kernel and UST tracing tools, and improvements to LTTng.

scholarly journals TEACHING INTERFACING FOR REAL-TIME SYSTEMS: NOW AND TOMORROW

2012 ◽  
Author(s):  
Witold Kinser ◽  
Dario Schor ◽  
Ken Beigun
Keyword(s):  
Real Time ◽  
Undergraduate Students ◽  
Transmission Lines ◽  
Error Detection ◽  
High Speed ◽  
Small Computer ◽  
Data Communications ◽  
Real Time Systems ◽  
Time Systems ◽  
The Impact

Teaching undergraduate students about interfacing of microprocessors and microcontrollers in real-time systems is challenging because the circuits have moved from medium to increasingly higher frequencies (multimega- and giga hertz), while wired interfacing has been augmented with wireless interfacing. This paper describes an attempt to accommodate the changes in an undergraduate course called Microprocessor Interfacing (µI) that has been offered at the University of Manitoba for many years now [1-4].The course presents real-time wired and wireless interfacing of microcontrollers, microprocessors, and microcomputers to the external world, including interfacing of input/output (I/O) devices with minimum hardware and software, as well as data acquisition with and without microprocessors, data communications, transmission and logging with embedded computers. The following topics are covered: (i) introduction on computing, architectures, processors, and technologies, (ii) architecture and organization of small computer buses, and synchronization of data transfers on local buses (iii) digital input and output (I/O), (iv) digital-to-analog (D/A) and analog-to-digital (A/D) signal conversions and converters, (v) and interfacing aspects in data communications, including encoding, modulation, error detection and forward error protection. The course also includes (a) demonstrations of bus architectures, modules, systems, and new devices, as well as (b) updates on new concepts, technologies, protocols, and software. The laboratories are innovative in terms of three levels of complexity: the Tier1 level includes five 3-hour standard labs designed for all students, the Tier2 is designed for more experienced students, and the Tier3 level lab is designed as a project for groups of students with demonstrated prior design and implementation experience [3].Tomorrow’s teaching will require a deeper exposure to high-speed circuits, as the impact of the distributed nature of signals in circuits increases due to the circuit interconnections acting as transmission lines. This requires software-based simulation and emulation of designs. Embedded systems on a chip may mitigate the problem to a degree. Course laboratories may also change because of the inexpensive equipment such as logic analyzers, protocol analyzers [5], and computer-based digital oscilloscopes. Since the test cost of such equipment is within a range of a student, laboratories-athome may also become a reality.The paper provides a description of a class structure of an interfacing course today, and identifies changes required by future material in such as course. An example of an implementation of a change is also provided.

Software Engineering for Real Time Systems

IEE Review ◽  
1992 ◽  
Vol 38 (3) ◽  
pp. 112
Author(s):  
Stuart Bennett
Keyword(s):  
Software Engineering ◽  
Real Time ◽  
Real Time Systems ◽  
Time Systems

Generic Round Robin Scheduling for Real Time Systems

2017 ◽  
Vol 7 (5) ◽  
pp. 148-155
Author(s):  
Pallab Banerjee ◽  
◽  
Riya Shree ◽  
Richa Kumari Verma ◽  
◽  
...  
Keyword(s):  
Real Time ◽  
Round Robin ◽  
Real Time Systems ◽  
Time Systems
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