Usage based predictive transistor aging model to optimize test limits on IO circuits
2016 ◽
Vol 325
◽
pp. 273-285
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1991 ◽
Vol 59
(3)
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pp. 275-289
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2006 ◽
Vol 17
(04)
◽
pp. 479-492
Keyword(s):
2015 ◽
Vol 15
(14)
◽
pp. 19835-19872
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