Fault Localization Based on Dynamic Slicing and Hitting-Set Computation

2010 ◽  
Author(s):  
Franz Wotawa
Keyword(s):  
Fault Localization ◽  
Hitting Set ◽  
Dynamic Slicing

The Multi-Slice Method of Program Slicing for Fault Location

2014 ◽  
Vol 971-973 ◽  
pp. 1808-1811
Author(s):  
Kun Liang Zhang ◽  
Xiu Ying Peng ◽  
Hao Hua Li
Keyword(s):  
Program Analysis ◽  
Fault Location ◽  
Fault Localization ◽  
Program Slicing ◽  
Localization Method ◽  
Advantages And Disadvantages ◽  
Dynamic Slicing ◽  
Full Analysis ◽  
Software Fault ◽  
Slice Method

Program slicing is a program analysis and understanding of technology. Sequence fault localization refers to the use of specific methods for faults in the program. Currently, the research program fault positioning is more and more people's attention and gets some results which is the more mainstream software fault localization method. Program slicing technique currently used to locate the fault procedures, which primarily to take advantage of dynamic slicing technique. Based on the full analysis of the advantages and disadvantages on the basis of previous work, we propose a flexible slicing rule and give a new method based on the slicing rule.

scholarly journals Applying Association Analysis to Dynamic Slicing Based Fault Localization

2014 ◽  
Vol E97.D (8) ◽  
pp. 2057-2066 ◽  
Author(s):  
Heling CAO ◽  
Shujuan JIANG ◽  
Xiaolin JU ◽  
Yanmei ZHANG ◽  
Guan YUAN
Keyword(s):  
Association Analysis ◽  
Fault Localization ◽  
Dynamic Slicing

scholarly journals Demystifying the Combination of Dynamic Slicing and Spectrum-based Fault Localization

2019 ◽  
Author(s):  
Sofia Reis ◽  
Rui Abreu ◽  
Marcelo d'Amorim
Keyword(s):  
Fault Diagnosis ◽  
Diagnostic Accuracy ◽  
Fault Localization ◽  
Dynamic Slicing ◽  
Software Fault ◽  
Automated Software ◽  
Comprehensive Study

Several approaches have been proposed to reduce debugging costs through automated software fault diagnosis. Dynamic Slicing (DS) and Spectrum-based Fault Localization (SFL) are popular fault diagnosis techniques and normally seen as complementary. This paper reports on a comprehensive study to reassess the effects of combining DS with SFL. With this combination, components that are often involved in failing but seldom in passing test runs could be located and their suspiciousness reduced. Results show that the DS-SFL combination, coined as Tandem-FL, improves the diagnostic accuracy up to 73.7% (13.4% on average). Furthermore, results indicate that the risk of missing faulty statements, which is a DS?s key limitation, is not high ? DS misses faulty statements in 9% of the 260 cases. To sum up, we found that the DS-SFL combination was practical and effective and encourage new SFL techniques to be evaluated against that optimization.

Lightweight Fault Localization using Weighted Dynamic Control Flow Subgraph

2020 ◽  
Vol 16 (2) ◽  
pp. 214
Author(s):  
Wang Yong ◽  
Liu SanMing ◽  
Li Jun ◽  
Cheng Xiangyu ◽  
Zhou Wan
Keyword(s):  
Dynamic Control ◽  
Fault Localization ◽  
Control Flow

A Manual Diagnosis Approach Using Targeted Fault Injection and Fault Simulation to Extend ATPG Diagnostic Resolution in Localizing Faults

2019 ◽  
Author(s):  
Rommel Estores ◽  
Karo Vander Gucht
Keyword(s):  
Fault Injection ◽  
Fault Simulation ◽  
Fault Localization ◽  
Pattern Generation ◽  
Test Coverage ◽  
Actual Case ◽  
Electrical Failure ◽  
Starting Point ◽  
Diagnostic Resolution ◽  
Diagnosis Approach

Abstract This paper discusses a creative manual diagnosis approach, a complementary technique that provides the possibility to extend Automatic Test Pattern Generation (ATPG) beyond its own limits. The authors will discuss this approach in detail using an actual case – a test coverage issue where user-generated ATPG patterns and the resulting ATPG diagnosis isolated the fault to a small part of the digital core. However, traditional fault localization techniques was unable to isolate the fault further. Using the defect candidates from ATPG diagnosis as a starting point, manual diagnosis through fault Injection and fault simulation was performed. Further fault localization was performed using the ‘not detected’ (ND) and/or ‘detected’ (DT) fault classes for each of the available patterns. The result has successfully deduced the defect candidates until the exact faulty net causing the electrical failure was identified. The ability of the FA lab to maximize the use of ATPG in combination with other tools/techniques to investigate failures in detail; is crucial in the fast root cause determination and, in case of a test coverage, aid in having effective test screen method implemented.

Advanced IR-OBIRCH Analysis Technique for High Isb Failure Analysis

2010 ◽  
Author(s):  
Kuo Hsiung Chen ◽  
Wen Sheng Wu ◽  
Yu Hsiang Shu ◽  
Jian Chan Lin
Keyword(s):  
Failure Analysis ◽  
Failure Mechanisms ◽  
Fault Localization ◽  
Resistance Change ◽  
The Real ◽  
Analysis Techniques ◽  
Analysis Technique ◽  
Leakage Failure ◽  
Failure Site

Abstract IR-OBIRCH (Infrared Ray – Optical Beam Induced Resistance Change) is one of the main failure analysis techniques [1] [2] [3] [4]. It is a useful tool to do fault localization on leakage failure cases such as poor Via or contact connection, FEoL or BEoL pattern bridge, and etc. But the real failure sites associated with the above failure mechanisms are not always found at the OBIRCH spot locations. Sometimes the real failure site is far away from the OBIRCH spot and it will result in inconclusive PFA Analysis. Finding the real failure site is what matters the most for fault localization detection. In this paper, we will introduce one case using deep sub-micron process generation which suffers serious high Isb current at wafer donut region. In this case study a BEoL Via poor connection is found far away from the OBIRCH spots. This implies that layout tracing skill and relation investigation among OBIRCH spots are needed for successful failure analysis.

Fault Localization of Power-Ground Short via Signal Injection and Oscilloscope Technique

2010 ◽  
Author(s):  
Binh Nguyen
Keyword(s):  
Low Cost ◽  
Short Circuit ◽  
Fault Localization ◽  
Fault Isolation ◽  
Test Apparatus ◽  
Good Working ◽  
Signal Injection ◽  
Set Up ◽  
Non Destructive ◽  
Short Circuit Condition

Abstract For those attempting fault isolation on computer motherboard power-ground short issues, the optimal technique should utilize existing test equipment available in the debug facility, requiring no specialty equipment as well as needing a minimum of training to use effectively. The test apparatus should be both easy to set up and easy to use. This article describes the signal injection and oscilloscope technique which meets the above requirements. The signal injection and oscilloscope technique is based on the application of Ohm's law in a short-circuit condition. Two experiments were conducted to prove the effectiveness of these techniques. Both experiments simulate a short-circuit condition on the VCC3 power rail of a good working PC motherboard and then apply the signal injection and oscilloscope technique to localize the short. The technique described is a simple, low cost and non-destructive method that helps to find the location of the power-ground short quickly and effectively.

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