Evaluating the Cache Architecture of Multicore Processors

16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008) ◽

10.1109/pdp.2008.22 ◽

2008 ◽

Cited By ~ 3

Author(s):

Jie Tao ◽

Marcel Kunze ◽

Wolfgang Karl

Keyword(s):

Multicore Processors ◽

Cache Architecture

Download Full-text

An Energy Efficient Multilevel Reconfigurable parallel Cache Architecture for Embedded Multicore Processors

2019 International Conference on Electrical, Electronics and Computer Engineering (UPCON) ◽

10.1109/upcon47278.2019.8980197 ◽

2019 ◽

Author(s):

Rahul Ratnakumar ◽

P. Vishnu Chaitanya ◽

S Gurunarayanan

Keyword(s):

Energy Efficient ◽

Multicore Processors ◽

Cache Architecture

Download Full-text

Energy-aware Filter Cache Architecture for Multicore Processors

2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications ◽

10.1109/delta.2010.21 ◽

2010 ◽

Cited By ~ 2

Author(s):

Young Jin Park ◽

Hong Jun Choi ◽

Cheol Hong Kim ◽

Jong-Myon Kim

Keyword(s):

Multicore Processors ◽

Energy Aware ◽

Cache Architecture

Download Full-text

Process Scheduling Challenges in the Era of Multicore Processors

Intel Technology Journal ◽

10.1535/itj.1104.09 ◽

2007 ◽

Vol 11 (04) ◽

Cited By ~ 11

Author(s):

Suresh Siddha

Keyword(s):

Multicore Processors ◽

Process Scheduling

Download Full-text

Designing heterogeneous systems including programmable hardware, multicore processors, DSP, processors and more

IET and Electronics Weekly Seminar on Programmable Hardware Systems ◽

10.1049/ic:20080616 ◽

2008 ◽

Author(s):

C. Turner

Keyword(s):

Multicore Processors ◽

Heterogeneous Systems ◽

Dsp Processors ◽

Programmable Hardware

Download Full-text

High Performance Parallelization of COMPSYN on a Cluster of Multicore Processors with GPUs

Procedia Computer Science ◽

10.1016/j.procs.2012.04.103 ◽

2012 ◽

Vol 9 ◽

pp. 966-975

Author(s):

Ferdinando Alessi ◽

Annalisa Massini ◽

Roberto Basili

Keyword(s):

High Performance ◽

Multicore Processors

Download Full-text

Mapping techniques in multicore processors: current and future trends

The Journal of Supercomputing ◽

10.1007/s11227-021-03650-6 ◽

2021 ◽

Author(s):

Manjari Gupta ◽

Lava Bhargava ◽

S. Indu

Keyword(s):

Multicore Processors ◽

Future Trends ◽

Mapping Techniques

Download Full-text

A Survey on Cache Timing Channel Attacks for Multicore Processors

Journal of Hardware and Systems Security ◽

10.1007/s41635-021-00115-3 ◽

2021 ◽

Author(s):

Jaspinder Kaur ◽

Shirshendu Das

Keyword(s):

Multicore Processors ◽

Timing Channel

Download Full-text

Compression and load balancing for efficient sparse matrix‐vector product on multicore processors and graphics processing units

Concurrency and Computation Practice and Experience ◽

10.1002/cpe.6515 ◽

2021 ◽

Author(s):

José I. Aliaga ◽

Hartwig Anzt ◽

Thomas Grützmacher ◽

Enrique S. Quintana‐Ortí ◽

Andrés E. Tomás

Keyword(s):

Load Balancing ◽

Graphics Processing Units ◽

Sparse Matrix ◽

Multicore Processors ◽

Vector Product ◽

Graphics Processing ◽

Matrix Vector

Download Full-text

Monolithic 3D-Based SRAM/MRAM Hybrid Memory for an Energy-Efficient Unified L2 TLB-Cache Architecture

IEEE Access ◽

10.1109/access.2021.3054021 ◽

2021 ◽

Vol 9 ◽

pp. 18915-18926

Author(s):

Young-Ho Gong

Keyword(s):

Energy Efficient ◽

Hybrid Memory ◽

Cache Architecture

Download Full-text

Information-flow control on ARM and POWER multicore processors

Formal Methods in System Design ◽

10.1007/s10703-021-00376-2 ◽

2021 ◽

Author(s):

Graeme Smith ◽

Nicholas Coughlin ◽

Toby Murray

Keyword(s):

Flow Control ◽

Information Flow ◽

Multicore Processors ◽

Information Flow Control

Download Full-text