scholarly journals Upgrade of the SLAC SLED-II pulse compression system based on recent high power tests

Author(s):  
A.E. Vlieks ◽  
W.R. Fowkes ◽  
R.J. Loewen ◽  
S.G. Tantawi
Author(s):  
Sami G. Tantawi ◽  
Christopher D. Nantista ◽  
Valery A. Dolgashev ◽  
Chris Pearson ◽  
Janice Nelson ◽  
...  

Author(s):  
Yuliang Jiang ◽  
Hao Zha ◽  
Ping Wang ◽  
Jiaru Shi ◽  
Huaibi Chen ◽  
...  

2012 ◽  
Vol 365 ◽  
pp. 012056 ◽  
Author(s):  
Vasudha Rajput ◽  
N Parmar ◽  
K S Bhat ◽  
K P Maheswari ◽  
Y Choyal

2011 ◽  
Vol 19 (2) ◽  
pp. 1395 ◽  
Author(s):  
C. J. Saraceno ◽  
O. H. Heckl ◽  
C. R. E. Baer ◽  
T. Südmeyer ◽  
U. Keller

2010 ◽  
Vol 22 (4) ◽  
pp. 849-852
Author(s):  
沈旭明 Shen Xuming ◽  
张鹏 Zhang Peng ◽  
和天慧 He Tianhui

2014 ◽  
Vol 1049-1050 ◽  
pp. 1718-1721
Author(s):  
Yan Xin Yu ◽  
Chun Yang Wang ◽  
Yu Chen ◽  
Ke Yang

Pulse compression technology is one of the key technologies in the field of modern radar signal processing, can effectively solve the contradiction between action distance and resolution. In this paper, a radar digital pulse compression system is designed and implemented based on FPGA with linear frequency modulated signal. The digital pulse compression module is designed using FFT IP core which can be reused in different periods of DPC, respectively performing FFT and IFFT calculation, so that the hardware consumption is saved significantly. Therefore, compared with other systems, the system designed in this paper has the characters of fast processing speed, high degree of modularity, real-time processing and short development cycle.


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