Low-power, high-efficiency wavelength conversion based on modulation instability in high nonlinearity optical fiber

Author(s):  
G.A. Nowak ◽  
Y.-H. Kao ◽  
T.J. Xia ◽  
M.N. Islam ◽  
D. Nolan
1998 ◽  
Vol 23 (12) ◽  
pp. 936 ◽  
Author(s):  
G. A. Nowak ◽  
Y.-H. Kao ◽  
T. J. Xia ◽  
M. N. Islam ◽  
D. Nolan

2021 ◽  
Vol 11 (14) ◽  
pp. 6549
Author(s):  
Hui Liu ◽  
Ming Zeng ◽  
Xiang Niu ◽  
Hongyan Huang ◽  
Daren Yu

The microthruster is the crucial device of the drag-free attitude control system, essential for the space-borne gravitational wave detection mission. The cusped field thruster (also called the High Efficiency Multistage Plasma Thruster) becomes one of the candidate thrusters for the mission due to its low complexity and potential long life over a wide range of thrust. However, the prescribed minimum of thrust and thrust noise are considerable obstacles to downscaling works on cusped field thrusters. This article reviews the development of the low power cusped field thruster at the Harbin Institute of Technology since 2012, including the design of prototypes, experimental investigations and simulation studies. Progress has been made on the downscaling of cusped field thrusters, and a new concept of microwave discharge cusped field thruster has been introduced.


CLEO: 2014 ◽  
2014 ◽  
Author(s):  
Duc Minh NGUYEN ◽  
Yang Di ◽  
Cesare Soci ◽  
Xuan Quyen Dinh ◽  
Ming Tang ◽  
...  

2012 ◽  
Vol 591-593 ◽  
pp. 2632-2635
Author(s):  
Lee Chu Liang ◽  
Roslina Mohd Sidek

A low power low-dropout (LDO) voltage regulator with self-reduction quiescent current is proposed in this paper. This proposed capacitorless LDO for Silicon-on-Chip (SoC) application has introduced a self-adjustable low-impedance circuitry at the output of LDO to attain stability critically during low output load current (less than a few hundred of micro-ampere). When the LDO load current increases, it reduces the LDO output impedance and moved the pole towards higher frequency away from the dominant pole and improving the system stability. When this happen, less amount of quiescent current is needed for the low-impedance circuitry to sustain the low output impedance. In this proposed LDO, the quiescent current that been used to sustain the low output impedance will be self-reduced when the output load current increases. Thus, the reduction of quiescent current at low output load current has tremendously improved the efficiency. The simulation results have shown a promising stability at low load current 0~1mA. The dropout voltage for this LDO is only 100mV at 1.2V supply. The proposed LDO is validated using Silterra 0.13μm CMOS process model and designed with high efficiency at low output load current.


1977 ◽  
Vol 16 (6) ◽  
pp. 1636 ◽  
Author(s):  
K. Egashira ◽  
M. Kobayashi
Keyword(s):  

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