Robustness Analysis of Mesh-Based Network-on-Chip Architecture under Flooding-Based Denial of Service Attacks

2013 ◽  
Author(s):  
Dabin Fang ◽  
Huikai Li ◽  
Jun Han ◽  
Xiaoyang Zeng
Keyword(s):  
Denial Of Service ◽  
Robustness Analysis ◽  
Network On Chip ◽  
Denial Of Service Attacks ◽  
On Chip

scholarly journals Effectiveness of HT-assisted sinkhole and blackhole denial of service attacks targeting mesh networks-on-chip

2018 ◽  
Vol 89 ◽  
pp. 84-94 ◽  
Author(s):  
Li Zhang ◽  
Xiaohang Wang ◽  
Yingtao Jiang ◽  
Mei Yang ◽  
Terrence Mak ◽  
...  
Keyword(s):  
Mesh Networks ◽  
Denial Of Service ◽  
Denial Of Service Attacks ◽  
Networks On Chip ◽  
On Chip

Securing a Wireless Network-on-Chip Against Jamming-Based Denial-of-Service and Eavesdropping Attacks

2019 ◽  
Vol 27 (12) ◽  
pp. 2781-2791 ◽  
Author(s):  
Abhishek Vashist ◽  
Andrew Keats ◽  
Sai Manoj Pudukotai Dinakarrao ◽  
Amlan Ganguly
Keyword(s):  
Wireless Network ◽  
Denial Of Service ◽  
Network On Chip ◽  
On Chip

scholarly journals Secure Network-on-Chip Against Black Hole and Tampering Attacks

2020 ◽  
Author(s):  
Luka Daoud
Keyword(s):  
Black Hole ◽  
Energy Consumption ◽  
Information Gain ◽  
Semiconductor Industry ◽  
Denial Of Service ◽  
Network On Chip ◽  
Sensitive Information ◽  
Threat Model ◽  
Area Overhead ◽  
On Chip

The Network-on-Chip (NoC) has become the communication heart of Multiprocessors-System-on-Chip (MPSoC). Therefore, it has been subject to a plethora of security threats to degrade the system performance or steal sensitive information. Due to the globalization of the modern semiconductor industry, many different parties take part in the hardware design of the system. As a result, the NoC could be infected with a malicious circuit, known as a Hardware Trojan (HT), to leave a back door for security breach purposes. HTs are smartly designed to be too small to be uncovered by offline circuit-level testing, so the system requires an online monitoring to detect and prevent the HT in runtime. This dissertation focuses on HTs inside the router of a NoC designed by a third party. It explores two HT-based threat models for the MPSoC, where the NoC experiences packet-loss and packet-tampering once the HT in the infected router is activated and is in the attacking state. Extensive experiments for each proposed architecture were conducted using a cycle-accurate simulator to demonstrate its effectiveness on the performance of the NoC-based system. The first threat model is the Black Hole Router (BHR) attack, where it silently discards the packets that are passing through without further announcement. The effect of the BHR is presented and analyzed to show the potency of the attack on a NoC-based system. A countermeasure protocol is proposed to detect the BHR at runtime and counteract the deliberate packet-dropping attack with a 26.9% area overhead, an average 21.31% performance overhead and a 22% energy consumption overhead. The protocol is extended to provide an efficient and power-gated scheme to enhance the NoC throughput and reduce the energy consumption by using end-to-end (e2e) approach. The power-gated e2e technique locates the BHR and avoids it with a 1% performance overhead and a 2% energy consumption overhead. The second threat model is a packet-integrity attack, where the HT tampers with the packet to apply a denial-of-service attack, steal sensitive information, gain unauthorized access, or misroute the packet to an unintended node. An authentic and secure NoC platform is proposed to detect and countermeasure the packet-tampering attack to maintain data-integrity and authenticity while keeping its secrecy with a 24.21% area overhead. The proposed NoC architecture is not only able to detect the attack, but also locates the infected router and isolates it from the network.

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