The subcircuit extraction problem

2003 ◽  
Vol 22 (3) ◽  
pp. 22-25 ◽  
Author(s):  
Nian Zhang ◽  
D.C. Wunsch ◽  
F. Harary
Keyword(s):  
Subcircuit Extraction

Efficient bit-parallel subcircuit extraction using CUDA

2015 ◽  
Vol 28 (16) ◽  
pp. 4326-4338 ◽  
Author(s):  
Che-Lun Hung ◽  
Chun-Yuan Lin ◽  
Chia-Shin Ou ◽  
Yuan-Hong Tseng ◽  
Po-Yen Hung ◽  
...  
Keyword(s):  
Subcircuit Extraction

scholarly journals SIGNAL-PATH-LEVEL DUAL-Vt ASSIGNMENT FOR LEAKAGE POWER REDUCTION

2006 ◽  
Vol 15 (02) ◽  
pp. 197-216 ◽  
Author(s):  
YU WANG ◽  
HUAZHONG YANG ◽  
HUI WANG
Keyword(s):  
Threshold Voltage ◽  
High Performance ◽  
Low Voltage ◽  
Power Reduction ◽  
Threshold Voltages ◽  
Fast Development ◽  
Static Power ◽  
Signal Path ◽  
Subcircuit Extraction ◽  
New Algorithms

Along with the fast development of dual-threshold voltage (dual-Vt) and multi-threshold technology, it is possible to use them to reduce static power in low-voltage high-performance circuits. In this paper, we propose a new method to realize CMOS digital circuits that are implemented with dual-Vt technology. We first present a new signal-path-level circuit model which effectively deals with the fact that there can be two threshold voltages assigned to a single gate. In order to assign proper threshold voltage to all the signal-paths in the circuit, our new algorithms introduce the concept of subcircuit extraction and include the hierarchy algorithms which are effective and fast. Experimental results show that our algorithms produce a significant reduction for the ISCAS85 benchmark circuits.

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