RF-MEMS: A development flow driving innovative device concepts to high performance components and networks for wireless applications

Author(s):  
J. Iannacci
2006 ◽  
Vol 13 (1) ◽  
pp. 79-83 ◽  
Author(s):  
Dong-Ming Fang ◽  
Yong Zhou ◽  
Xi-Ning Wang ◽  
Xiao-Lin Zhao
Keyword(s):  

2012 ◽  
Vol 81 ◽  
pp. 65-74 ◽  
Author(s):  
Jacopo Iannacci ◽  
Giuseppe Resta ◽  
Paola Farinelli ◽  
Roberto Sorrentino

MEMS (MicroElectroMechanical-Systems) technology applied to the field of Radio Frequency systems (i.e. RF-MEMS) has emerged in the last 10-15 years as a valuable and viable solution to manufacture low-cost and very high-performance passive components, like variable capacitors, inductors and micro-relays, as well as complex networks, like tunable filters, reconfigurable impedance matching networks and phase shifters, and so on. The availability of such components and their integration within RF systems (e.g. radio transceivers, radars, satellites, etc.) enables boosting the characteristics and performance of telecommunication systems, addressing for instance a significant increase of their reconfigurability. The benefits resulting from the employment of RF-MEMS technology are paramount, being some of them the reduction of hardware redundancy and power consumption, along with the operability of the same RF system according to multiple standards. After framing more in detail the whole context of RF MEMS technology, this paper will provide a brief introduction on a typical RF-MEMS technology platform. Subsequently, some relevant examples of lumped RF MEMS passive elements and complex reconfigurable networks will be reported along with their measured RF performance and characteristics.


Author(s):  
V. Puyal ◽  
Cea Leti ◽  
Laas Cnrs ◽  
D. Titz

Author(s):  
P.N. Metange ◽  
K. B. Khanchandani

<p>This paper presents the analysis and design of high performance phase frequency detector, charge pump and loop filter circuits for phase locked loop in wireless applications. The proposed phase frequency detector (PFD) consumes only 8 µW and utilises small area. Also, at 1.8V voltage supply the maximum operation frequency of the conventional PFD is 500 MHz whereas proposed PFD is 5 GHz. Hence, highly suitable for low power, high speed and low jitter applications.  The differential charge pump uses switches using NMOS and the inverter delays for up and down signals do not generate any offset due to its fully symmetric operation. This configuration doubles the range of output voltage compliance compared to single ended charge pump. Differential stage is less sensitive to the leakage current since leakage current behaves as common mode offset with the dual output stages. All the circuits are implemented using cadence 0.18 μm CMOS Process.</p>


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