A Detection Algorithm for Maneuvering IR Point Target and Its Performance Evaluation

Author(s):  
Feng-yun Zhu ◽  
Shi-yin Qin
1994 ◽  
Vol 23 (3) ◽  
pp. 21-26 ◽  
Author(s):  
Chim-fu Yeung ◽  
Sheung-lun Hung ◽  
Kam-yiu Lam

2011 ◽  
Vol 20 (02) ◽  
pp. 297-312 ◽  
Author(s):  
MONIKA SCHUBERT ◽  
ALEXANDER FELFERNIG

When interacting with constraint-based recommender applications, users describe their preferences with the goal of identifying the products that fit their wishes and needs. In such a scenario, users are repeatedly adapting and changing their requirements. As a consequence, situations occur where none of the products completely fulfils the given set of requirements and users need a support in terms of an indicator of minimal sets of requirements that need to be changed in order to be able to find a recommendation. The identification of such minimal sets relies heavily on the existence of (minimal) conflict sets. In this paper we introduce BFX (Boosted FastXplain), a conflict detection algorithm which exploits the basic structural properties of constraint-based recommendation problems. BFX shows a significantly better performance compared to existing conflict detection algorithms. In order to demonstrate the performance of BFX, we report the results of a comparative performance evaluation.


2017 ◽  
Vol 22 (1) ◽  
pp. 70-79
Author(s):  
Jae-Yong Lee ◽  
Yun-Soo Chung ◽  
Dae-Sub Kim ◽  
Gyu-Hyun Bae ◽  
Jae-Sung Bae ◽  
...  

2009 ◽  
Vol 2 (4) ◽  
pp. 81-91 ◽  
Author(s):  
Hashir Karim Kidwai ◽  
Fadi N. Sibai ◽  
Tamer Rabie

In the world of multi-core processors, the STI Cell Broadband Engine (BE) stands out as a heterogeneous 9-core processor with a PowerPC host processor (PPE) and 8 synergic processor engines (SPEs). The Cell BE architecture is designed to improve upon conventional processors in graphics and related areas by integrating 8 computation engines each with multiple execution units and large register sets to achieve a high performance per area return. In this paper, we discuss the parallelization, implementation and performance evaluation of an edge detection image processing application based on the Roberts edge detector on the Cell BE. The authors report the edge detection performance measured on a computer with one Cell processor and with varying numbers of synergic processor engines enabled. These results are compared to the results obtained on the Cell’s single PPE with all 8 SPEs disabled. The results indicate that edge detection performs 10 times faster on the Cell BE than on modern RISC processors.


Author(s):  
Luca Superiori ◽  
Olivia Nemethova ◽  
Markus Rupp

In this chapter, we present the possibility of detecting errors in H.264/AVC encoded video streams. Standard methods usually discard the damaged received packet. Since they can still contain valid information, the localization of the corrupted information elements prevents discarding of the error-free data. The proposed error detection method exploits the set of entropy coded words as well as range and significance of the H.264/AVC information elements. The performance evaluation of the presented technique is performed for various bit error probabilities. The results are compared to the typical packet discard approach. Particular focus is given on low-rate video sequences.


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