A new framework for power estimation of embedded systems

Computer ◽  
2005 ◽  
Vol 38 (2) ◽  
pp. 71-78 ◽  
Author(s):  
C. Talarico ◽  
J.W. Rozenblit ◽  
V. Malhotra ◽  
A. Stritter
1997 ◽  
Vol 44 (1) ◽  
pp. 37-61 ◽  
Author(s):  
William Fornaciari ◽  
Paolo Gubian ◽  
Donatella Sciuto ◽  
Cristina Silvano

Author(s):  
Shang-Wei Lin ◽  
Chao-Sheng Lin ◽  
Chun-Hsien Lu ◽  
Yean-Ru Chen ◽  
Pao-Ann Hsiung

Multi-core processors are becoming prevalent rapidly in personal computing and embedded systems. Nevertheless, the programming environment for multi-core processor based systems is still quite immature and lacks efficient tools. This chapter will propose a new framework called VERTAF/Multi-Core (VMC) and show how software code can be automatically generated from high-level SysML models of multi-core embedded systems. It will also illustrate how model-driven design based on SysML can be seamlessly integrated with Intel’s Threading Building Blocks (TBB) and Quantum Platform (QP) middleware. Finally, this chapter will use a digital video recording (DVR) system to illustrate the benefits of the proposed VMC framework.


1998 ◽  
Vol 6 (2) ◽  
pp. 266-275 ◽  
Author(s):  
W. Fornaciari ◽  
P. Gubian ◽  
D. Sciuto ◽  
C. Silvano

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