Nonlinear Phase Noise Mitigation With Soft-Differential Decoding and Nonredundant Error Correction for Hybrid 10G/100G Transmission

2011 ◽  
Vol 23 (13) ◽  
pp. 866-868 ◽  
Author(s):  
Fabian N. Hauske ◽  
Zhuhong Zhang ◽  
Chuandong Li ◽  
Yanjun Zhu ◽  
Yanming Li ◽  
...  
Keyword(s):  
Error Correction ◽  
Phase Noise ◽  
Noise Mitigation ◽  
Nonlinear Phase

scholarly journals Nonlinear phase noise mitigation in phase-sensitive amplified transmission systems

2015 ◽  
Vol 23 (9) ◽  
pp. 11724 ◽  
Author(s):  
Samuel L.I. Olsson ◽  
Magnus Karlsson ◽  
Peter A. Andrekson
Keyword(s):  
Phase Noise ◽  
Noise Mitigation ◽  
Transmission Systems ◽  
Nonlinear Phase ◽  
Phase Sensitive

scholarly journals Nonparameter Nonlinear Phase Noise Mitigation by Using M-ary Support Vector Machine for Coherent Optical Systems

2013 ◽  
Vol 5 (6) ◽  
pp. 7800312-7800312 ◽  
Author(s):  
Minliang Li ◽  
Song Yu ◽  
Jie Yang ◽  
Zhixiao Chen ◽  
Yi Han ◽  
...  
Keyword(s):  
Support Vector Machine ◽  
Phase Noise ◽  
Optical Systems ◽  
Support Vector ◽  
Noise Mitigation ◽  
Nonlinear Phase

scholarly journals Artificial Neural Network Assisted Error Correction for MLC NAND Flash Memory

Micromachines ◽  
2021 ◽  
Vol 12 (8) ◽  
pp. 879
Author(s):  
Ruiquan He ◽  
Haihua Hu ◽  
Chunru Xiong ◽  
Guojun Han
Keyword(s):  
Neural Network ◽  
Error Correction ◽  
Error Detection ◽  
Flash Memory ◽  
Nand Flash ◽  
Data Reliability ◽  
Nand Flash Memory ◽  
Process Technology ◽  
Noise Mitigation ◽  
Memory Channel

The multilevel per cell technology and continued scaling down process technology significantly improves the storage density of NAND flash memory but also brings about a challenge in that data reliability degrades due to the serious noise. To ensure the data reliability, many noise mitigation technologies have been proposed. However, they only mitigate one of the noises of the NAND flash memory channel. In this paper, we consider all the main noises and present a novel neural network-assisted error correction (ANNAEC) scheme to increase the reliability of multi-level cell (MLC) NAND flash memory. To avoid using retention time as an input parameter of the neural network, we propose a relative log-likelihood ratio (LLR) to estimate the actual LLR. Then, we transform the bit detection into a clustering problem and propose to employ a neural network to learn the error characteristics of the NAND flash memory channel. Therefore, the trained neural network has optimized performances of bit error detection. Simulation results show that our proposed scheme can significantly improve the performance of the bit error detection and increase the endurance of NAND flash memory.

Compensation of Nonlinear Phase Noise Using the Effective Negative Nonlinearity of a Nonlinear Amplifying Loop Mirror

2012 ◽  
Vol 18 (2) ◽  
pp. 637-645 ◽  
Author(s):  
Klaus Sponsel ◽  
Christian Stephan ◽  
Georgy Onishchukov ◽  
Bernhard Schmauss ◽  
Gerd Leuchs
Keyword(s):  
Phase Noise ◽  
Nonlinear Phase ◽  
Loop Mirror ◽  
Nonlinear Amplifying Loop Mirror
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