Characterizing Vulnerability of Network Interfaces in Embedded Chip Multiprocessors

Yong Zou;  Yi Xiang; S. Pasricha

doi:10.1109/les.2012.2193553

Characterizing Vulnerability of Network Interfaces in Embedded Chip Multiprocessors

IEEE Embedded Systems Letters ◽

10.1109/les.2012.2193553 ◽

2012 ◽

Vol 4 (2) ◽

pp. 41-44 ◽

Cited By ~ 2

Author(s):

Yong Zou ◽

Yi Xiang ◽

S. Pasricha

Keyword(s):

Chip Multiprocessors ◽

Network Interfaces ◽

Embedded Chip

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A case for lifetime-aware task mapping in embedded chip multiprocessors

Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES/ISSS '10 ◽

10.1145/1878961.1878987 ◽

2010 ◽

Cited By ~ 18

Author(s):

Adam S. Hartman ◽

Donald E. Thomas ◽

Brett H. Meyer

Keyword(s):

Chip Multiprocessors ◽

Task Mapping ◽

Embedded Chip

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Notice of Violation of IEEE Publication Principles: An Energy-Efficient Heterogeneous Memory Architecture for Future Dark Silicon Embedded Chip-Multiprocessors

IEEE Transactions on Emerging Topics in Computing ◽

10.1109/tetc.2016.2563323 ◽

2019 ◽

pp. 1-1 ◽

Cited By ~ 4

Author(s):

Salman Onsori ◽

Arghavan Asad ◽

Kaamran Raahemifar ◽

Mahmood Fathy

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Memory Architecture ◽

Dark Silicon ◽

Embedded Chip

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Write activity reduction on non-volatile main memories for embedded chip multiprocessors

ACM Transactions on Embedded Computing Systems ◽

10.1145/2442116.2442127 ◽

2013 ◽

Vol 12 (3) ◽

pp. 1-27 ◽

Cited By ~ 35

Author(s):

Jingtong Hu ◽

Chun Jason Xue ◽

Qingfeng Zhuge ◽

Wei-Che Tseng ◽

Edwin H.-M. Sha

Keyword(s):

Chip Multiprocessors ◽

Embedded Chip

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Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors

2017 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2017.8016154 ◽

2017 ◽

Cited By ~ 2

Author(s):

Fatemeh Arezoomand ◽

Arghavan Asad ◽

Mahdi Fazeli ◽

Mahmood Fathy ◽

Farah Mohammadi

Keyword(s):

Chip Multiprocessors ◽

Energy Aware ◽

Cache Design ◽

Embedded Chip

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Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors

Journal of Signal Processing Systems ◽

10.1007/s11265-008-0276-5 ◽

2008 ◽

Vol 57 (2) ◽

pp. 155-172

Author(s):

Anca M. Molnos ◽

Sorin D. Cotofana ◽

Marc J. M. Heijligers ◽

Jos T. J. van Eijndhoven

Keyword(s):

Chip Multiprocessors ◽

Cache Management ◽

Embedded Chip

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Compositional, dynamic cache management for embedded chip multiprocessors

2008 Design, Automation and Test in Europe ◽

10.1109/date.2008.4484810 ◽

2008 ◽

Cited By ~ 1

Author(s):

Anca M. Molnos ◽

Marc J.M. Heijligers ◽

Sorin D. Cotofana

Keyword(s):

Chip Multiprocessors ◽

Cache Management ◽

Embedded Chip

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Multi-level on-chip memory hierarchy design for embedded chip multiprocessors

12th International Conference on Parallel and Distributed Systems - (ICPADS'06) ◽

10.1109/icpads.2006.66 ◽

2006 ◽

Cited By ~ 7

Author(s):

O. Ozturk ◽

M. Kandemir ◽

M.J. Irwin ◽

S. Tosun

Keyword(s):

Chip Multiprocessors ◽

Memory Hierarchy ◽

Multi Level ◽

On Chip ◽

Embedded Chip

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Energy-aware computation duplication for improving reliability in embedded chip multiprocessors

Asia and South Pacific Conference on Design Automation, 2006. ◽

10.1145/1118299.1118342 ◽

2006 ◽

Cited By ~ 2

Author(s):

G. Chen ◽

M. Kandemir ◽

F. Li

Keyword(s):

Chip Multiprocessors ◽

Energy Aware ◽

Embedded Chip

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Optimizing inter-processor data locality on embedded chip multiprocessors

Proceedings of the 5th ACM international conference on Embedded software - EMSOFT '05 ◽

10.1145/1086228.1086271 ◽

2005 ◽

Cited By ~ 2

Author(s):

G. Chen ◽

M. Kandemir

Keyword(s):

Chip Multiprocessors ◽

Data Locality ◽

Embedded Chip

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SPM conscious loop scheduling for embedded chip multiprocessors

12th International Conference on Parallel and Distributed Systems - (ICPADS'06) ◽

10.1109/icpads.2006.102 ◽

2006 ◽

Author(s):

Liping Xue ◽

M. Kandemir ◽

Guangyu Chen ◽

T. Yemliha

Keyword(s):

Chip Multiprocessors ◽

Loop Scheduling ◽

Embedded Chip

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