Complete Solution-Processed Low-Voltage Hybrid CdS Thin-Film Transistors With Polyvinyl Phenol as a Gate Dielectric

2018 ◽  
Vol 39 (5) ◽  
pp. 703-706 ◽  
Author(s):  
M. G. Syamala Rao ◽  
S. Meraz-Davila ◽  
M. A. Quevedo-Lopez ◽  
R. Ramirez-Bon
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Voltage ◽  
Complete Solution ◽  
Solution Processed ◽  
Cds Thin Film

Low-Voltage a-InGaZnO Thin-Film Transistors With Anodized Thin HfO2 Gate Dielectric

2015 ◽  
Vol 36 (6) ◽  
pp. 573-575 ◽  
Author(s):  
Yang Shao ◽  
Xiang Xiao ◽  
Xin He ◽  
Wei Deng ◽  
Shengdong Zhang
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Voltage

SuPR-NaP Technique for Printing Ultrafine Silver Electrodes and its Use for Low-Voltage Operation of Organic Thin-Film Transistors

MRS Advances ◽  
2018 ◽  
Vol 3 (49) ◽  
pp. 2931-2936
Author(s):  
G. Kitahara ◽  
K. Aoshima ◽  
J. Tsutsumi ◽  
H. Minemawari ◽  
S. Arai ◽  
...  
Keyword(s):  
Thin Film ◽  
Dielectric Layer ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Voltage ◽  
Organic Thin Film Transistors ◽  
Base Layer ◽  
Organic Thin Film ◽  
Low Voltage Operation ◽  
Silver Electrodes

ABSTRACTRecently, an epoch-making printing technology called “SuPR-NaP (Surface Photo-Reactive Nanometal Printing)” that allows easy, high-speed, and large-area manufacturing of ultrafine silver wiring patterns has been developed. Here we demonstrate low-voltage operation of organic thin-film transistors (OTFTs) composed of printed source/drain electrodes that are produced by the SuPR-NaP technique. We utilize an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a base layer for producing patterned reactive surface in the SuPR-NaP technique but also as an ultrathin gate dielectric layer of OTFTs. By the use of 22 nm-thick Cytop gate dielectric layer, we successfully operate polycrystalline pentacene OTFTs below 2 V with negligible hysteresis. We also observe the improvement of carrier injection by the surface modification of printed silver electrodes. We discuss that the SuPR-NaP technique allows the production of high-capacitance gate dielectric layers as well as high-resolution printed silver electrodes, which provides promising bases for producing practical active-matrix OTFT backplanes.

Eco-friendly, solution-processed In-W-O thin films and their applications in low-voltage, high-performance transistors

2016 ◽  
Vol 4 (20) ◽  
pp. 4478-4484 ◽  
Author(s):  
Ao Liu ◽  
Guoxia Liu ◽  
Huihui Zhu ◽  
Byoungchul Shin ◽  
Elvira Fortunato ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Thin Film Transistors ◽  
High Performance ◽  
Low Voltage ◽  
Low Cost ◽  
Solution Process ◽  
Solution Processed

Eco-friendly IWO thin films are fabricated via a low-cost solution process and employed as channel layers in thin-film transistors.

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