Low-Voltage High-Performance Pentacene Thin-Film Transistors With Ultrathin PVP/High- $\kappa$ HfLaO Hybrid Gate Dielectric

2010 ◽  
Author(s):  
Woo Cheol Shin ◽  
Hanul Moon ◽  
Seunghyup Yoo ◽  
Yuxiang Li ◽  
Byung Jin Cho
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
High Performance ◽  
Gate Dielectric ◽  
Low Voltage

Low-Voltage a-InGaZnO Thin-Film Transistors With Anodized Thin HfO2 Gate Dielectric

2015 ◽  
Vol 36 (6) ◽  
pp. 573-575 ◽  
Author(s):  
Yang Shao ◽  
Xiang Xiao ◽  
Xin He ◽  
Wei Deng ◽  
Shengdong Zhang
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Voltage

SuPR-NaP Technique for Printing Ultrafine Silver Electrodes and its Use for Low-Voltage Operation of Organic Thin-Film Transistors

MRS Advances ◽  
2018 ◽  
Vol 3 (49) ◽  
pp. 2931-2936
Author(s):  
G. Kitahara ◽  
K. Aoshima ◽  
J. Tsutsumi ◽  
H. Minemawari ◽  
S. Arai ◽  
...  
Keyword(s):  
Thin Film ◽  
Dielectric Layer ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Voltage ◽  
Organic Thin Film Transistors ◽  
Base Layer ◽  
Organic Thin Film ◽  
Low Voltage Operation ◽  
Silver Electrodes

ABSTRACTRecently, an epoch-making printing technology called “SuPR-NaP (Surface Photo-Reactive Nanometal Printing)” that allows easy, high-speed, and large-area manufacturing of ultrafine silver wiring patterns has been developed. Here we demonstrate low-voltage operation of organic thin-film transistors (OTFTs) composed of printed source/drain electrodes that are produced by the SuPR-NaP technique. We utilize an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a base layer for producing patterned reactive surface in the SuPR-NaP technique but also as an ultrathin gate dielectric layer of OTFTs. By the use of 22 nm-thick Cytop gate dielectric layer, we successfully operate polycrystalline pentacene OTFTs below 2 V with negligible hysteresis. We also observe the improvement of carrier injection by the surface modification of printed silver electrodes. We discuss that the SuPR-NaP technique allows the production of high-capacitance gate dielectric layers as well as high-resolution printed silver electrodes, which provides promising bases for producing practical active-matrix OTFT backplanes.

Sign in / Sign up

Export Citation Format

Share Document