Testing fully differential amplifiers using common mode feedback circuit: A case study

Author(s):  
Isis D. Bender ◽  
Guilherme S. Cardoso ◽  
Arthur C. de Oliveira ◽  
Lucas C. Severo ◽  
Alessandro Girardi ◽  
...  
2016 ◽  
Vol 25 (10) ◽  
pp. 1650124 ◽  
Author(s):  
S. Rekha ◽  
T. Laxminidhi

Continuous time common mode feedback (CMFB) circuits for low voltage, low power applications are proposed. Four circuits are proposed for gate/bulk-driven pseudo-differential transconductors operating on sub-1-V power supply. The circuits are validated for a bulk-driven pseudo-differential transconductor operating on 0.5[Formula: see text]V in 0.18[Formula: see text][Formula: see text]m standard CMOS technology. Simulation results reveal that the proposed CMFB circuits offer power efficient solution for setting the output common mode of the transconductors. They also load the transconductor capacitively offering capacitance of about 1[Formula: see text]fF to tens of femto farads.


Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 991
Author(s):  
Joseph Riad ◽  
Sergio Soto-Aguilar ◽  
Johan J. Estrada-López ◽  
Oscar Moreira-Tamayo ◽  
Edgar Sánchez-Sinencio

Fully differential amplifiers require the use of common-mode feedback (CMFB) circuits to properly set the amplifier’s operating point. Due to scaling trends in CMOS technology, modern amplifiers increasingly rely on cascading more than two stages to achieve sufficient gain. With multiple gain stages, different topologies for implementing CMFB are possible, whether using a single CMFB loop or multiple ones. However, the impact on performance of each CMFB approach has seldom been studied in the literature. The aim of this work is to guide the choice of the CMFB implementation topology evaluating performance in terms of stability, linearity, noise and common-mode rejection. We present a detailed theoretical analysis, comparing the relative performance of two CMFB configurations for 3-stage OTA topologies in an implementation-agnostic manner. Our analysis is then corroborated through a case study with full simulation results comparing the two topologies at the transistor level and confirming the theoretical intuition. An active-RC filter is used as an example of a high-linearity OTA application, highlighting a 6 dB improvement in P1dB in the multi-loop implementation with respect to the single-loop case.


2020 ◽  
Vol 10 (4) ◽  
pp. 34
Author(s):  
Mario Renteria-Pinon ◽  
Jaime Ramirez-Angulo ◽  
Alejandro Diaz-Sanchez

A simple scheme to implement class AB low-voltage fully differential amplifiers that do not require an output common-mode feedback network (CMFN) is introduced. It has a rail to rail output signal swing and high rejection of common-mode input signals. It operates in strong inversion with ±300 mV supplies in a 180 nm CMOS process. It uses an auxiliary amplifier that minimizes supply requirements by setting the op-amp input terminals very close to one of the rails and also serves as a common-mode feedback network to generate complementary output signals. The scheme is verified with simulation results of an amplifier that consumes 25 µW, has a gain-bandwidth product (GBW) of 16.1 MHz, slew rate (SR) of 8.4 V/µs, the small signal figure of merit (FOMSS) of 6.49 MHz*pF/µW, the large signal figure of merit (FOMLS) of 3.39 V/µs*pF/µW, and current efficiency (CE) of 2.03 in strong inversion, with a 10 pF load capacitance.


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