High-voltage transistor scaling circuit techniques for high-density negative-gate channel-erasing NOR flash memories

2002 ◽  
Vol 37 (10) ◽  
pp. 1318-1325 ◽  
Author(s):  
T. Tanzawa ◽  
Y. Takano ◽  
K. Watanabe ◽  
S. Atsumi
2003 ◽  
Vol 91 (4) ◽  
pp. 554-568 ◽  
Author(s):  
I. Motta ◽  
G. Ragone ◽  
O. Khouri ◽  
G. Torelli ◽  
R. Micheloni

2005 ◽  
Author(s):  
Dong-Sun Min ◽  
Dong-Soo Jun ◽  
Sooin Cho ◽  
Yongsik Seok ◽  
Youngrae Kim ◽  
...  

2010 ◽  
Vol 147 (2) ◽  
pp. 418-427 ◽  
Author(s):  
K. König ◽  
I. Block ◽  
A. Nesterov ◽  
G. Torralba ◽  
S. Fernandez ◽  
...  

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