Bit-Error Probability for Direct Detection of Optical RZ Signal Degraded by ASE Noise and Timing Jitter

2007 ◽  
Vol 25 (2) ◽  
pp. 638-643 ◽  
Author(s):  
Stanislav Derevyanko ◽  
Sergei Turitsyn
Keyword(s):  
Error Probability ◽  
Direct Detection ◽  
Timing Jitter ◽  
Bit Error Probability

scholarly journals Ratio-based multi-level resistive memory cells

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Miguel Angel Lastras-Montaño ◽  
Osvaldo Del Pozo-Zamudio ◽  
Lev Glebsky ◽  
Meiran Zhao ◽  
Huaqiang Wu ◽  
...  
Keyword(s):  
Error Probability ◽  
Resistance Switching ◽  
Closed Form Expression ◽  
Memory Cells ◽  
Resistive Memory ◽  
Worst Case ◽  
Information Encoding ◽  
Bit Error Probability ◽  
Multi Level ◽  
Switching Devices

AbstractRatio-based encoding has recently been proposed for single-level resistive memory cells, in which the resistance ratio of a pair of resistance-switching devices, rather than the resistance of a single device (i.e. resistance-based encoding), is used for encoding single-bit information, which significantly reduces the bit error probability. Generalizing this concept for multi-level cells, we propose a ratio-based information encoding mechanism and demonstrate its advantages over the resistance-based encoding for designing multi-level memory systems. We derive a closed-form expression for the bit error probability of ratio-based and resistance-based encodings as a function of the number of levels of the memory cell, the variance of the distribution of the resistive states, and the ON/OFF ratio of the resistive device, from which we prove that for a multi-level memory system using resistance-based encoding with bit error probability x, its corresponding bit error probability using ratio-based encoding will be reduced to $$x^2$$ x 2 at the best case and $$x^{\sqrt{2}}$$ x 2 at the worst case. We experimentally validated these findings on multiple resistance-switching devices and show that, compared to the resistance-based encoding on the same resistive devices, our approach achieves up to 3 orders of magnitude lower bit error probability, or alternatively it could reduce the cell’s programming time and programming energy by up 5–10$$\times$$ × , while achieving the same bit error probability.

scholarly journals Additive boundary of error probability in a discrete data transmission channel with noise-immune coding and grouping of errors

2020 ◽  
pp. 78-86
Author(s):  
Valentin Dzhumkov ◽  
Georgy Maltsev
Keyword(s):  
Data Transmission ◽  
Error Probability ◽  
Theory Development ◽  
Analytical Description ◽  
Discrete Data ◽  
Analytical Models ◽  
Binomial Model ◽  
Transmission Channel ◽  
Bit Error Probability ◽  
Analytical Expressions

Introduction: Data transmission reliability analysis when using noise-immune coding in channels with grouping of errors (in particular, in radio channels with interference and fading of the received signals) is complicated by the need to use discrete data transmission channel models which take into account the error grouping, differing from the traditional binomial model. The complexity of the analytical description of such models leads to the fact that the quality indicators of data transmission over channels with error grouping are usually analyzed by simulation methods, and the development of analytical models of data transmission discrete channels with grouping of errors is one of the modern direction in the noise-immune coding theory development. Purpose: Finding the additive boundary of a bit error probability for data transmission discrete channel with grouping of symbol errors, described by Elliot — Hilbert model. Results: For the case of data transmission using a group noise-immune code, analytical expressions are obtained for calculating the additive boundary of a bit error probability in a discrete data transmission channel with grouping of symbol errors. The obtained expressions take into account the features of data transmission over a channel with error grouping, in particular, the fact that the probabilities of various combinations of the same number of errors are not equal to each other. Examples are presented of calculating a bit error probability for the case of using noise-immune codes which correct errors. It is shown that for any code length, the use of the Elliot — Hilbert model allows you to substantially refine the results of calculating the probabilistic indicators of the reliability of data transmission in channels with error grouping, as compared to the original binomial model. The obtained results are compared to the results of the simulation. Practical relevance: The results can be used in the design and analysis of the characteristics of data transmission systems for various purposes, operating under conditions of error grouping. Using analytical expressions to calculate the probability indicators of the reliability of data transfer allows you to abandon complex simulation modeling of transmitting data in channels with error grouping at the stage of choosing a noise-immune code and its parameters.

scholarly journals MODELLING OF SPINTRONIC DEVICES FOR APPLICATION IN RANDOM ACCESS MEMORY

2020 ◽  
Vol 10 (1) ◽  
pp. 62-65
Author(s):  
Ruslan Politanskyi ◽  
Maria Vistak ◽  
Andriy Veryga ◽  
Tetyana Ruda
Keyword(s):  
Error Probability ◽  
High Speed ◽  
Scientific Research ◽  
Single Domain ◽  
Memory Devices ◽  
Magnetization Process ◽  
Recording Time ◽  
Bit Error Probability ◽  
Recording Process ◽  
Wide Range

The article analyzes the physical processes that occur in spin-valve structures during recording process which occurs in high-speed magnetic memory devices. Considered are devices using magnetization of the ferromagnetic layer through transmitting magnetic moment by polarized spin (STT-MRAM). Basic equations are derived to model the information recording process in the model of symmetric binary channel. Because the error probability arises from the magnetization process, a model of the magnetization process is formed, which is derived from the Landau-Lifshitz-Gilbert equations under the assumption of a single-domain magnet. The choice of a single-domain model is due to the nanometer size of the flat magnetic layer. The developed method of modeling the recording process determines the dependence of such characteristics as the bit error probability and the rate of recording on two important technological characteristics of the recording process: the value of the current and its duration. The end result and the aim of the simulation is to determine the optimal values of the current and its duration at which the speed of the recording process is the highest for a given level of error probability. The numerical values of the transmission rate and error probability were obtained for a wide range of current values (10–1500 μA) and recording time of one bit (1–70 ns), and generally correctly describe the process of information transmission. The calculated data were compared with the technical characteristics of existing industrial devices and devices which are the object of the scientific research. The resulting model can be used to simulate devices using different values of recording currents: STT-MRAM series chips using low current values (500-100 μA), devices in the stage of technological design and using medium current values (100–500 μA) and devices that are the object of experimental scientific research and use high currents (500–1000 μA). The model can also be applied to simulate devices with different data rates, which have different requirements for both transmission speed and bit error probability. In this way, the model can be applied to both high-speed memory devices in computer systems and signal sensors, which are connected to sensor networks or connected to the IoT.

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