scholarly journals ATPG for Reversible Circuits Using Simulation, Boolean Satisfiability, and Pseudo Boolean Optimization

2011 ◽  
Author(s):  
Robert Wille ◽  
Hongyan Zhang ◽  
Rolf Drechsler
Keyword(s):  
Boolean Satisfiability ◽  
Reversible Circuits ◽  
Boolean Optimization

scholarly journals Determining minimal testsets for reversible circuits using Boolean satisfiability

2011 ◽  
Author(s):  
Hongyan Zhang ◽  
Stefan Frehse ◽  
Robert Wille ◽  
Rolf Drechsler
Keyword(s):  
Boolean Satisfiability ◽  
Reversible Circuits

A Multilevel Pseudo-Boolean Satisfiability-Based Approach for Segmented Channel Routing

2015 ◽  
Vol 24 (06) ◽  
pp. 1550083
Author(s):  
Dahua Zhang ◽  
Wei Li ◽  
Tao Du
Keyword(s):  
Optimization Technique ◽  
Field Programmable Gate Arrays ◽  
Boolean Satisfiability ◽  
Channel Routing ◽  
Routing Problem ◽  
Gate Arrays ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
Np Complete ◽  
Boolean Optimization

The segmented channel routing problem is fundamental to the routing of row-based field programmable gate arrays (FPGAs) and is proven to be nondeterministic polynomial time (NP) complete. In this paper, we capitalize on the compelling advancements in satisfiability (SAT) solvers to propose a multilevel pseudo-Boolean SAT-based approach. We construct several levels of hierarchy amongst the nets and the routing problem of each level is formulated as a pseudo-Boolean optimization (PBO) problem. Moreover, an optimization technique of reducing the number of variables in PBO problems is described to improve the scalability of the proposed method. Similar to the SAT-based routing, the unroutability of a given circuit can be proved by the approach. Experimental results show that the proposed method compares very favorably with existing algorithms and achieves the best convergence rate.

scholarly journals Homing Sequence Derivation with Quantified Boolean Satisfiability

2021 ◽  
pp. 1-1
Author(s):  
Kuan-Hua Tu ◽  
Hung-En Wang ◽  
Jie-Hong Roland Jiang ◽  
Natalia Kushik ◽  
Nina Yevtushenko
Keyword(s):  
Boolean Satisfiability

DFT with Universal Test Set for All Missing Gate Faults in Reversible Circuits

2021 ◽  
Author(s):  
Joyati Mondal ◽  
Dipak Kumar Kole ◽  
Hafizur Rahaman ◽  
Debesh Kumar Das ◽  
Bhargab B. Bhattacharya
Keyword(s):  
Test Set ◽  
Universal Test ◽  
Reversible Circuits
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