The Simulation Study of Process Variation on Threshold Voltage in 180nm Floating-Gate device

2019 ◽  
Author(s):  
THINH Dang Cong ◽  
TOI Le Thanh ◽  
HAO Mai Tri ◽  
TRANG Hoang
Keyword(s):  
Simulation Study ◽  
Threshold Voltage ◽  
Process Variation ◽  
Floating Gate

scholarly journals Improved Memory Properties of Graphene Oxide-Based Organic Memory Transistors

Micromachines ◽  
2019 ◽  
Vol 10 (10) ◽  
pp. 643 ◽  
Author(s):  
Amjad Al-shawi ◽  
Maysoon Alias ◽  
Paul Sayers ◽  
Mohammed Fadhil Mabrook
Keyword(s):  
Graphene Oxide ◽  
Threshold Voltage ◽  
High Mobility ◽  
Floating Gate ◽  
Insulating Layer ◽  
Organic Memory ◽  
Large Hysteresis ◽  
High Charge Density ◽  
Output Characteristics ◽  
Clear Shift

To investigate the behaviour of the organic memory transistors, graphene oxide (GO) was utilized as the floating gate in 6,13-Bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene)-based organic memory transistors. A cross-linked, off-centre spin-coated and ozone-treated poly(methyl methacrylate) (cPMMA) was used as the insulating layer. High mobility and negligible hysteresis with very clear transistor behaviour were observed for the control transistors. On the other hand, memory transistors exhibited clear large hysteresis which is increased with increasing programming voltage. The shifts in the threshold voltage of the transfer characteristics as well as the hysteresis in the output characteristics were attributed to the charging and discharging of the floating gate. The counter-clockwise direction of hysteresis indicates that the process of charging and discharging the floating gate take place through the semiconductor/insulator interface. A clear shift in the threshold voltage was observed when different voltage pulses were applied to the gate. The non-volatile behaviour of the memory transistors was investigated in terms of charge retention. The memory transistors exhibited a large memory window (~30 V), and high charge density of (9.15 × 1011 cm−2).

Threshold Voltage Shift in Hetero-nanocystal Floating Gate Flash Memory

2004 ◽  
Vol 832 ◽  
Author(s):  
Yan Zhu ◽  
Dengtao Zhao ◽  
Ruigang Li ◽  
Jianlin Liu
Keyword(s):  
Threshold Voltage ◽  
Flash Memory ◽  
Oxide Thickness ◽  
Memory Device ◽  
Floating Gate ◽  
Threshold Voltage Shift ◽  
Voltage Shift ◽  
Poisson Boltzmann ◽  
Poisson Boltzmann Equation ◽  
Dot Density

ABSTRACTThe threshold voltage shift of a p-channel Ge/Si hetero-nanocrystal floating gate memory device was investigated both numerically and phenomenologically. The numerical investigations, by solving 2-D Poisson-Boltzmann equation, show that the presence of the Ge on Si dot tremendously prolongs the retention time, reflected by the time decay behavior of the threshold voltage shift. The increase of the thickness of either Si or Ge dot will reduce the threshold voltage shift. The shift strongly depends on the dot density. Nevertheless, only a weak relation between the threshold voltage shift and the tunneling oxide thickness was found. A circuit model was then introduced to interpret the behavior of threshold voltage shift, which agrees well with the results of the numerical method.

The Equivalent Circuit Model of Floating-Gate Single-Electron Memorizer

2013 ◽  
Vol 416-417 ◽  
pp. 1721-1725
Author(s):  
Liang Gong ◽  
Rui Ming Li ◽  
Qi Xiong ◽  
Shao Hua Zhou
Keyword(s):  
Threshold Voltage ◽  
Equivalent Circuit Model ◽  
Storage Condition ◽  
Floating Gate ◽  
Single Electron ◽  
Threshold Voltage Shift ◽  
Silicon Quantum Dot ◽  
Working Principle ◽  
Single Electron Devices ◽  
With Memory

Based on the introduction of floating-gate silicon quantum dot single-electron memorizers structure and working principle, this paper builds corresponding lumping current and capacitance model to calculate the current with memory in the circumstance of linearity, saturation and sub-threshold. Taking advantage of the single-electron devices Threshold Voltage Shift educes different storage condition of nanostorage with different threshold voltage. The simulation shows, this model can precisely simulate memorys read and write state.

Threshold Voltage Dependence of Random Telegraph Noise in 65 nm Floating Gate Multi-Level-Cell Memories

2019 ◽  
Vol 11 (1) ◽  
pp. 87-91
Author(s):  
Xiaojuan Zhao ◽  
Wenbing Fan ◽  
Yaping Wang ◽  
Haoliang Li ◽  
Xiaonan Yang
Keyword(s):  
Threshold Voltage ◽  
Voltage Dependence ◽  
Floating Gate ◽  
Random Telegraph Noise ◽  
Telegraph Noise ◽  
Multi Level
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