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Reliability oriented process and device simulations of power VDMOS transistors in Bipolar/CMOS/DMOS technology
IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits
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10.1109/ipfa.2003.1222733
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2004
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Cited By ~ 4
Author(s):
Y. Rey-Tauriac
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M. Taurin
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H. Lhermite
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O. Bonnaud
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