A Floating-point Coprocessor Configured by a FPGA in a Digital Platform Based on Fixed-point DSP for Power Electronics

2006 ◽  
Author(s):  
Haibing Hu ◽  
Tianjun Jin ◽  
Xianmiao Zhang ◽  
Zhengyu Lu ◽  
Zhaoming Qian
Keyword(s):  
Fixed Point ◽  
Power Electronics ◽  
Floating Point ◽  
Digital Platform

A Real-Time Sequence Detection Algorithm for Floating Point Unit Design

2014 ◽  
Vol 687-691 ◽  
pp. 3494-3497
Author(s):  
Wei Sun ◽  
Jun She An ◽  
Shuang Yang
Keyword(s):  
Fixed Point ◽  
Real Time ◽  
Detection Algorithm ◽  
Time Sequence ◽  
Floating Point ◽  
Design Data ◽  
Sequence Detection ◽  
Unit Design ◽  
Floating Point Unit ◽  
Short Time

Sequence detection is used in many algorithms and applications. Sequences are different depending on different demands. In the process of floating-point CORDIC coprocessor design,data are need to change from floating point format to fixed point format. This process is necessary to detect the number of consecutive zeros. We design the leading-zero-counting algorithm to achieve this function, and this conversion process is completed in a very fixed short time, to ensure the needs of the floating point CORDIC coprocessor.

Sign in / Sign up

Export Citation Format

Share Document