Custom machine learning architectures: towards realtime anomaly detection for flight testing

2018 ◽  
Author(s):  
Di Wu ◽  
Zhanrui Sun ◽  
Yongxin Zhu ◽  
Li Tian ◽  
Hanlin Zhu ◽  
...  
Keyword(s):  
Machine Learning ◽  
Anomaly Detection ◽  
Flight Testing ◽  
Learning Architectures

Anomaly Detection in Drone-Captured Images Using Machine Learning Techniques and Deep Learning Architectures

2021 ◽  
pp. 783-791
Author(s):  
Kartik Joshi ◽  
G. Vidya ◽  
Soumya Shaw ◽  
Abitha K. Thyagarajan ◽  
Akhil Pathak ◽  
...  
Keyword(s):  
Machine Learning ◽  
Deep Learning ◽  
Anomaly Detection ◽  
Machine Learning Techniques ◽  
Learning Techniques ◽  
Learning Architectures

scholarly journals OutlierNets: Highly Compact Deep Autoencoder Network Architectures for On-Device Acoustic Anomaly Detection

Sensors ◽  
2021 ◽  
Vol 21 (14) ◽  
pp. 4805
Author(s):  
Saad Abbasi ◽  
Mahmoud Famouri ◽  
Mohammad Javad Shafiee ◽  
Alexander Wong
Keyword(s):  
Machine Learning ◽  
Anomaly Detection ◽  
Detection Methods ◽  
Detection Accuracy ◽  
Network Architectures ◽  
Design Exploration ◽  
Convolutional Autoencoder ◽  
Acoustic Anomaly ◽  
Human Operators ◽  
Computational Resources

Human operators often diagnose industrial machinery via anomalous sounds. Given the new advances in the field of machine learning, automated acoustic anomaly detection can lead to reliable maintenance of machinery. However, deep learning-driven anomaly detection methods often require an extensive amount of computational resources prohibiting their deployment in factories. Here we explore a machine-driven design exploration strategy to create OutlierNets, a family of highly compact deep convolutional autoencoder network architectures featuring as few as 686 parameters, model sizes as small as 2.7 KB, and as low as 2.8 million FLOPs, with a detection accuracy matching or exceeding published architectures with as many as 4 million parameters. The architectures are deployed on an Intel Core i5 as well as a ARM Cortex A72 to assess performance on hardware that is likely to be used in industry. Experimental results on the model’s latency show that the OutlierNet architectures can achieve as much as 30x lower latency than published networks.

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