High-Performance Pipelined Architecture for Tree-Based IP Lookup Engine on FPGA

2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum ◽

10.1109/ipdpsw.2013.168 ◽

2013 ◽

Cited By ~ 4

Author(s):

Yun Qu ◽

Viktor K. Prasanna

Keyword(s):

High Performance ◽

Ip Lookup ◽

Pipelined Architecture

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A Hybrid-Pipelined Architecture for FPGA-based Binary Weight DenseNet with High Performance-Efficiency

2020 IEEE High Performance Extreme Computing Conference (HPEC) ◽

10.1109/hpec43674.2020.9286185 ◽

2020 ◽

Author(s):

Shihao Zeng ◽

Yihua Huang

Keyword(s):

High Performance ◽

Pipelined Architecture ◽

Binary Weight

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High-Performance Pipelined Architecture of Elliptic Curve Scalar Multiplication Over GF(2m)

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2015.2453360 ◽

2016 ◽

Vol 24 (4) ◽

pp. 1223-1232 ◽

Cited By ~ 20

Author(s):

Lijuan Li ◽

Shuguo Li

Keyword(s):

Elliptic Curve ◽

High Performance ◽

Scalar Multiplication ◽

Pipelined Architecture ◽

Elliptic Curve Scalar Multiplication

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A Bit-Serial Pipelined Architecture for High-Performance DHT Computation in Quantum-Dot Cellular Automata

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2014.2363519 ◽

2015 ◽

Vol 23 (10) ◽

pp. 2352-2356 ◽

Cited By ~ 26

Author(s):

Vikramkumar Pudi ◽

K. Sridharan

Keyword(s):

Cellular Automata ◽

Quantum Dot ◽

High Performance ◽

Quantum Dot Cellular Automata ◽

Pipelined Architecture ◽

Bit Serial

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A high-performance pipelined architecture for measurement and monitoring of multiple sensor signals

IEEE Transactions on Instrumentation and Measurement ◽

10.1109/19.199412 ◽

1992 ◽

Vol 41 (6) ◽

pp. 808-814 ◽

Cited By ~ 2

Author(s):

H.G. Rotithor

Keyword(s):

High Performance ◽

Pipelined Architecture ◽

Sensor Signals ◽

Multiple Sensor

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High performance pipelined architecture of Ghash

2010 3rd IEEE International Conference on Broadband Network and Multimedia Technology (IC-BNMT) ◽

10.1109/icbnmt.2010.5705183 ◽

2010 ◽

Cited By ~ 2

Author(s):

Yan Bai ◽

Guochu Shou ◽

Yihong Hu ◽

Zhigang Guo

Keyword(s):

High Performance ◽

Pipelined Architecture

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A Hybrid Pipelined Architecture for High Performance Top-K Sorting on FPGA

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2019.2938892 ◽

2020 ◽

Vol 67 (8) ◽

pp. 1449-1453

Author(s):

Weijie Chen ◽

Weijun Li ◽

Feng Yu

Keyword(s):

High Performance ◽

Pipelined Architecture

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High-performance IP Lookup Engine with Compact Clustered Trie Search

The Computer Journal ◽

10.1093/comjnl/bxs008 ◽

2012 ◽

Vol 55 (12) ◽

pp. 1447-1466

Author(s):

O. Erdem ◽

C. F. Bazlamacci

Keyword(s):

High Performance ◽

Ip Lookup

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High performance IP lookup circuit using DDR SDRAM

2008 IEEE International SOC Conference ◽

10.1109/socc.2008.4641547 ◽

2008 ◽

Author(s):

Xin Yang ◽

Jun Mu ◽

Sakir Sezer ◽

John McCanny ◽

Earl Swartzlander

Keyword(s):

High Performance ◽

Ip Lookup

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A design of high-performance pipelined architecture for H.264/AVC CAVLC decoder and low-power implementation

IEEE Transactions on Consumer Electronics ◽

10.1109/tce.2010.5681169 ◽

2010 ◽

Vol 56 (4) ◽

pp. 2781-2789 ◽

Cited By ~ 8

Author(s):

Byung-Yup Lee ◽

Kwang-Ki Ryoo

Keyword(s):

Low Power ◽

High Performance ◽

Pipelined Architecture

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High-performance TCAM-based IP lookup engines

IEEE INFOCOM 2008 - IEEE Conference on Computer Communications Workshops ◽

10.1109/infocom.2008.4544593 ◽

2008 ◽

Cited By ~ 2

Author(s):

Hui Yu ◽

Jing Chen ◽

Jianping Wang ◽

S.Q. Zheng

Keyword(s):

High Performance ◽

Ip Lookup

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