Implementing a Blocked Aasen's Algorithm with a Dynamic Scheduler on Multicore Architectures

2013 IEEE 27th International Symposium on Parallel and Distributed Processing ◽

10.1109/ipdps.2013.98 ◽

2013 ◽

Cited By ~ 3

Author(s):

Grey Ballard ◽

Dulceneia Becker ◽

James Demmel ◽

Jack Dongarra ◽

Alex Druinsky ◽

...

Keyword(s):

Multicore Architectures ◽

Dynamic Scheduler

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Low-level Code Auto-tuning for State-of-the-art Multicore Architectures

2019 29th International Conference Radioelektronika (RADIOELEKTRONIKA) ◽

10.1109/radioelek.2019.8733456 ◽

2019 ◽

Author(s):

Alexey Ivutin ◽

Anna Troshina ◽

Alexander S. Novikov

Keyword(s):

State Of The Art ◽

Multicore Architectures ◽

Low Level ◽

Auto Tuning

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Conflict-free symmetric sparse matrix-vector multiplication on multicore architectures

Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis ◽

10.1145/3295500.3356148 ◽

2019 ◽

Cited By ~ 1

Author(s):

Athena Elafrou ◽

Georgios Goumas ◽

Nectarios Koziris

Keyword(s):

Sparse Matrix ◽

Multicore Architectures ◽

Matrix Vector Multiplication ◽

Matrix Vector

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Parallel Graph Partitioning on Multicore Architectures

Languages and Compilers for Parallel Computing - Lecture Notes in Computer Science ◽

10.1007/978-3-642-19595-2_17 ◽

2011 ◽

pp. 246-260 ◽

Cited By ~ 11

Author(s):

Xin Sui ◽

Donald Nguyen ◽

Martin Burtscher ◽

Keshav Pingali

Keyword(s):

Graph Partitioning ◽

Multicore Architectures ◽

Parallel Graph

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Profiling high performance dense linear algebra algorithms on multicore architectures for power and energy efficiency

Computer Science - Research and Development ◽

10.1007/s00450-011-0191-z ◽

2011 ◽

Vol 27 (4) ◽

pp. 277-287 ◽

Cited By ~ 17

Author(s):

Hatem Ltaief ◽

Piotr Luszczek ◽

Jack Dongarra

Keyword(s):

Energy Efficiency ◽

Linear Algebra ◽

High Performance ◽

Multicore Architectures ◽

Dense Linear Algebra ◽

Power And Energy

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A cache topology-aware multi-query scheduler for multicore architectures

2014 IEEE International Symposium on Workload Characterization (IISWC) ◽

10.1109/iiswc.2014.6983047 ◽

2014 ◽

Cited By ~ 1

Author(s):

Umut Orhan ◽

Wei Ding ◽

Praveen Yedlapalli ◽

Mahmut Kandemir ◽

Ozcan Ozturk

Keyword(s):

Multicore Architectures

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A thermal-aware scheduling for multicore architectures

Journal of Systems Architecture ◽

10.1016/j.sysarc.2015.12.003 ◽

2016 ◽

Vol 62 ◽

pp. 54-62 ◽

Cited By ~ 2

Author(s):

Ting-Hsuan Chien ◽

Rong-Guey Chang

Keyword(s):

Multicore Architectures

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Configurable workload generators for multicore architectures

2011 IEEE International SOC Conference ◽

10.1109/socc.2011.6085077 ◽

2011 ◽

Author(s):

Amayika Panda ◽

Annie Avakian ◽

Ranga Vemuri

Keyword(s):

Multicore Architectures

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A convex optimization framework for leakage aware thermal provisioning in 3D multicore architectures

2010 11th International Symposium on Quality Electronic Design (ISQED) ◽

10.1109/isqed.2010.5450487 ◽

2010 ◽

Cited By ~ 1

Author(s):

Sanghamitra Roy ◽

Koushik Chakraborty

Keyword(s):

Convex Optimization ◽

Multicore Architectures ◽

Optimization Framework

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Energy Efficiency Evaluation of Parallel Execution of DEVS Models in Multicore Architectures

2020 Winter Simulation Conference (WSC) ◽

10.1109/wsc48552.2020.9384117 ◽

2020 ◽

Author(s):

Guillermo G. Trabes ◽

Veronica Gil Costa ◽

Gabriel A. Wainer

Keyword(s):

Energy Efficiency ◽

Parallel Execution ◽

Efficiency Evaluation ◽

Multicore Architectures ◽

Energy Efficiency Evaluation

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New safe reliable design methodologies examined by fault injection testing and Monte Carlo simulation: tolerating shared-memory interferences in multicore architectures

International Journal of Embedded Systems ◽

10.1504/ijes.2021.117956 ◽

2021 ◽

Vol 14 (4) ◽

pp. 409

Author(s):

Abdullah El Bayoumi

Keyword(s):

Monte Carlo Simulation ◽

Monte Carlo ◽

Shared Memory ◽

Fault Injection ◽

Multicore Architectures ◽

Design Methodologies ◽

Reliable Design

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