Design and Implementation of the Digital Costas Loop Based on Software Defined Radio

2011 ◽  
Author(s):  
Ziheng Yang ◽  
Yuan Bai ◽  
Zhongjun Zhao
Keyword(s):  
Software Defined Radio ◽  
Design And Implementation ◽  
Costas Loop

Realization of Programmable BPSK Demodulator-Bit Synchronizer using Multirate Processing

2014 ◽  
Vol 3 (1) ◽  
pp. 18
Author(s):  
Anshuman Sharma ◽  
Abdul Hafeez Syed ◽  
Midhun M ◽  
M R Raghavendra
Keyword(s):  
Data Rate ◽  
Timing Error ◽  
Specific Data ◽  
Matlab Simulink ◽  
Design And Implementation ◽  
Loop Design ◽  
Error Detector ◽  
Costas Loop ◽  
Multirate Processing

This paper presents the design and implementation of programmable BPSK demodulator and bit synchronizer. The demodulator is based on the Costas loop design whereas the bit synchronizer is based on Gardner timing error detector. The advantage of this design is that it offers programmability using multi-rate processing and does not rely on computation of filter coefficients, NCO angle input for each specific data rate and thus avoids computational complexities. The algorithm and its application were verified on Matlab-Simulink and were implemented on ALTERA platform. A 32 kHz BPSK demodulator–bit synchronizer pair catering for a data rate from 1kbps to 8kbps was implemented.

The design and implementation of Biphase Costas Loop

1982 ◽  
Vol 5 (4) ◽  
pp. 253-260
Author(s):  
Hen‐Wai Tsao ◽  
Lee‐Chuan Chang
Keyword(s):  
Design And Implementation ◽  
Costas Loop
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