Using genetic algorithm for slicing floorplan area optimization in circuit design

Author(s):  
N. Mani ◽  
B. Srinivasan
2016 ◽  
Vol 24 ◽  
pp. 1022-1033
Author(s):  
Hasari KARCİ ◽  
Gülay TOHUMOĞLU ◽  
Arif NACAROĞLU

2009 ◽  
Vol 07 (05) ◽  
pp. 969-989 ◽  
Author(s):  
MAJID MOHAMMADI ◽  
MAJID HAGHPARAST ◽  
MOHAMMAD ESHGHI ◽  
KEIVAN NAVI

Reversible logic and binary coded decimal (BCD) arithmetic are two concerning subjects of hardware. This paper proposes a modular synthesis method to realize a reversible BCD-full adder (BCD-FA) and subtractor circuit. We propose three approaches to design and optimize all parts of a BCD-FA circuit using genetic algorithm and don't care concept. Our first approach is based on the Hafiz's work, and the second one is based on the whole BCD-FA circuit design. In the third approach, a binary to BCD converter is presented. Optimizations are done in terms of number of gates, number of garbage inputs/outputs, and the quantum cost of the circuit. We present four designs for BCD-FA with four different goals: minimum garbage inputs/outputs, minimum quantum cost, minimum number of gates, and optimum circuit in terms of all the above parameters.


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