scholarly journals Energy and Power Characterization of Parallel Programs Running on Intel Xeon Phi

2014 ◽  
Author(s):  
Joal Wood ◽  
Ziliang Zong ◽  
Qijun Gu ◽  
Rong Ge
Keyword(s):  
Parallel Programs ◽  
Xeon Phi ◽  
Intel Xeon Phi ◽  
Intel Xeon

scholarly journals Debugging Parallel Programs in DVM-System

2020 ◽  
Vol 23 (4) ◽  
pp. 866-886
Author(s):  
Vladimir Aleksandrovich Bakhtin ◽  
Dmitry Aleksandrovich Zakharov ◽  
Aleksandr Aleksandrovich Ermichev ◽  
Victor Alekseevich Krukov
Keyword(s):  
Parallel Programming ◽  
Heterogeneous Computing ◽  
Programming Model ◽  
Parallel Programs ◽  
Xeon Phi ◽  
Intel Xeon Phi ◽  
Parallel Programming Model ◽  
Intel Xeon

DVM-system is designed for the development of parallel programs of scientific and technical calculations in the C-DVMH and Fortran-DVMH languages. These languages use a single DVMH-model of parallel programming model and are an extension of the standard C and Fortran languages with parallelism specifications in the form of compiler directives. The DVMH model makes it possible to create efficient parallel programs for heterogeneous computing clusters, in the nodes of which accelerators, graphic processors or Intel Xeon Phi coprocessors can be used as computing devices along with universal multi-core processors. The article describes the method of debugging parallel programs in DVM-system, as well as new features of DVM-debugger.

scholarly journals DALIGNER Performance Evaluation on Intel Xeon Phi Architecture

10.29007/j5cs ◽  
2019 ◽  
Author(s):  
Evaldo Costa ◽  
Gabriel Silva ◽  
Marcello Teixeira
Keyword(s):  
Dna Sequence ◽  
Parallel Programs ◽  
Xeon Phi ◽  
Intel Xeon Phi ◽  
Base Pairs ◽  
Scalable Architectures ◽  
Sequencing Technologies ◽  
Dna Sequence Assembly ◽  
Long Read ◽  
Intel Xeon

In bioinformatics, DNA sequence assembly refers to the reconstruction of an original DNA sequence by the alignment and merging of fragments that can be obtained from several sequencing methods. The main sequencing methods process thousands or even millions of these fragments, which can be short (hundreds of base pairs) or long (thousands of base pairs) read sequences. This is a highly computational task, which usually requires the use of parallel programs and algorithms, so that it can be performed with desirable accuracy and within suitable time limits. In this paper, we evaluate the performance of DALIGNER long read sequences aligner in a system using the Intel Xeon Phi 7210 processor. We are looking for scalable architectures that could provide a higher throughput that can be applied to future sequencing technologies.

scholarly journals Progress in Dvm-System

2020 ◽  
Vol 23 (3) ◽  
pp. 247-270
Author(s):  
Valery Fedorovich Aleksahin ◽  
Vladimir Aleksandrovich Bakhtin ◽  
Olga Fedorovna Zhukova ◽  
Dmitry Aleksandrovich Zakharov ◽  
Victor Alekseevich Krukov ◽  
...  
Keyword(s):  
Parallel Programming ◽  
Heterogeneous Computing ◽  
Programming Model ◽  
Parallel Programs ◽  
Xeon Phi ◽  
Intel Xeon Phi ◽  
Parallel Programming Model ◽  
Intel Xeon

DVM-system is designed for the development of parallel programs of scientific and technical calculations in the C-DVMH and Fortran-DVMH languages. These languages use a single DVMH-model of parallel programming model and are an extension of the standard C and Fortran languages with parallelism specifications in the form of compiler directives. The DVMH model makes it possible to create efficient parallel programs for heterogeneous computing clusters, in the nodes of which accelerators, graphic processors or Intel Xeon Phi coprocessors can be used as computing devices along with universal multi-core processors. The article presents new features of DVM-system that have been developed recently.

scholarly journals MILC Code Performance on High End CPU and GPU Supercomputer Clusters

2018 ◽  
Vol 175 ◽  
pp. 02009
Author(s):  
Carleton DeTar ◽  
Steven Gottlieb ◽  
Ruizi Li ◽  
Doug Toussaint
Keyword(s):  
Conjugate Gradient ◽  
Memory Hierarchy ◽  
Xeon Phi ◽  
Intel Xeon Phi ◽  
Code Performance ◽  
Recent Developments ◽  
Knights Landing ◽  
Many Core ◽  
Intel Xeon

With recent developments in parallel supercomputing architecture, many core, multi-core, and GPU processors are now commonplace, resulting in more levels of parallelism, memory hierarchy, and programming complexity. It has been necessary to adapt the MILC code to these new processors starting with NVIDIA GPUs, and more recently, the Intel Xeon Phi processors. We report on our efforts to port and optimize our code for the Intel Knights Landing architecture. We consider performance of the MILC code with MPI and OpenMP, and optimizations with QOPQDP and QPhiX. For the latter approach, we concentrate on the staggered conjugate gradient and gauge force. We also consider performance on recent NVIDIA GPUs using the QUDA library.

Performance Evaluation of NAS Parallel Benchmarks on Intel Xeon Phi

2013 ◽  
Author(s):  
Arunmoezhi Ramachandran ◽  
Jerome Vienne ◽  
Rob Van Der Wijngaart ◽  
Lars Koesterke ◽  
Ilya Sharapov
Keyword(s):  
Performance Evaluation ◽  
Xeon Phi ◽  
Intel Xeon Phi ◽  
Intel Xeon
Sign in / Sign up

Export Citation Format

Share Document