CCSpec: A Correctness Condition Specification Tool

2019 ◽  
Author(s):  
Christina Peterson ◽  
Pierre LaBorde ◽  
Damian Dechev
Keyword(s):  
Correctness Condition

FROM LOCKS TO CORRECT AND EFFICIENT TRANSACTIONAL MEMORY

2012 ◽  
Vol 21 (02) ◽  
pp. 1240005
Author(s):  
CHENG WANG ◽  
YOUFENG WU
Keyword(s):  
Transactional Memory ◽  
Parallel Programs ◽  
Parallel Program ◽  
Program Execution ◽  
Software Transactional Memory ◽  
Correctness Condition ◽  
Critical Sections ◽  
Efficient Software

Transactional memory addresses a number of important issues in lock-based parallel programs. Unfortunately, the semantics of transactions are different from those of critical sections defined by locks. The semantic differences make it difficult to correctly port existing lock-based programs to transaction-based programs. Experienced programmers accustomed to lock-based programming can easily make mistakes in transaction-based programming as parallel programs running correctly using locks can run incorrectly when critical sections are converted to using transactions. This problem becomes even more severe in porting lock-based programs to use the efficient software transactional memory. In this paper, we first identify three necessary properties in a program for the program execution using transactions to be equivalent to the program execution using locks. Assuming that the input lock-based program satisfies the necessary properties (i.e., a well-behaved parallel program), we next present a correctness condition to verify the transactional memory implementation in order for the program execution using transactions to be equivalent to the program execution using locks. Finally, we develop a correct and efficient software transactional memory implementation that satisfies the correctness condition so that locks in the well-behaved parallel programs can be converted to use the efficient software transactional memory easily and correctly.

A Correctness Condition for High-Performance Multiprocessors

1998 ◽  
Vol 27 (6) ◽  
pp. 1637-1670 ◽  
Author(s):  
Hagit Attiya ◽  
Roy Friedman
Keyword(s):  
High Performance ◽  
Correctness Condition

A NOTE ON LINEARIZABILITY AND THE GLOBAL TIME AXIOM

2003 ◽  
Vol 13 (01) ◽  
pp. 19-24 ◽  
Author(s):  
BERNADETTE CHARRON-BOST ◽  
ROBERT CORI
Keyword(s):  
Distributed Systems ◽  
Correctness Condition ◽  
Concurrent Objects ◽  
Global Time ◽  
Linearizable System ◽  
Made In

The assumption of the existence of global time, which significantly simplifies the analysis of distributed systems, is generally safe since most of the conclusions obtained under the global time axiom can be transferred to the frame where no such assumption is made. In this note, we show that the compositionality of the well-known correctness condition for concurrent objects called linearizability does not satisfy this simplification rule: we present a simple non-linearizable system composed of two objects which are individually linearizable.

Desire That Amounts to Knowledge

2020 ◽  
Vol 71 (1) ◽  
pp. 56-73
Author(s):  
Allan Hazlett
Keyword(s):  
Mental Representation ◽  
Correctness Condition ◽  
Guise Of The Good

Abstract I argue that desire sometimes amounts to knowledge, in the same sense that belief sometimes amounts to knowledge. The argument rests on two assumptions: that goodness is the correctness condition for desire (which is one articulation of the idea that we desire things under the ‘guise of the good’) and that knowledge is apt mental representation (which is a generalized virtue-theoretic account of knowledge). Desire that amounts to knowledge—or ‘conative knowledge’—is illustrated by cases in which someone knows the goodness of something despite not believing that it is good.

REACHABILITY ANALYSIS IN VERIFICATION VIA SUPERCOMPILATION

2008 ◽  
Vol 19 (04) ◽  
pp. 953-969 ◽  
Author(s):  
ALEXEI LISITSA ◽  
ANDREI P. NEMYTYKH
Keyword(s):  
Program Transformation ◽  
Reachability Analysis ◽  
Safety Properties ◽  
Transformation Technique ◽  
Correctness Condition ◽  
Parameterized Systems

We present an approach to verification of parameterized systems, which is based on program transformation technique known as supercompilation. In this approach the statements about safety properties of a system to be verified are translated into the statements about properties of the program that simulates and tests the system. Supercompilation is used then to establish the required properties of the program. In this paper we show that reachability analysis performed by supercompilation can be seen as the proof of a correctness condition by induction. We formulate suitable induction principles and proof strategies and illustrate their use by examples of verification of parameterized protocols.

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