Wide frequency range (30 M-1 GHz) low noise figure, low power, active CMOS mixer

2003 ◽  
Author(s):  
E.W. El-Shewekh ◽  
M.H. El-Saba
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Wide Frequency Range ◽  
Low Noise ◽  
Frequency Range ◽  
Cmos Mixer

60 GHz-Band Low-Noise Amplifier

2017 ◽  
Vol 26 (05) ◽  
pp. 1750075 ◽  
Author(s):  
Najam Muhammad Amin ◽  
Lianfeng Shen ◽  
Zhi-Gong Wang ◽  
Muhammad Ovais Akhter ◽  
Muhammad Tariq Afridi
Keyword(s):  
Transmission Line ◽  
Quality Factor ◽  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Constant Current ◽  
60 Ghz ◽  
Frequency Range ◽  
Constant Current Density ◽  
Chip Area

This paper presents the design of a 60[Formula: see text]GHz-band LNA intended for the 63.72–65.88[Formula: see text]GHz frequency range (channel-4 of the 60[Formula: see text]GHz band). The LNA is designed in a 65-nm CMOS technology and the design methodology is based on a constant-current-density biasing scheme. Prior to designing the LNA, a detailed investigation into the transistor and passives performances at millimeter-wave (MMW) frequencies is carried out. It is shown that biasing the transistors for an optimum noise figure performance does not degrade their power gain significantly. Furthermore, three potential inductive transmission line candidates, based on coplanar waveguide (CPW) and microstrip line (MSL) structures, have been considered to realize the MMW interconnects. Electromagnetic (EM) simulations have been performed to design and compare the performances of these inductive lines. It is shown that the inductive quality factor of a CPW-based inductive transmission line ([Formula: see text] is more than 3.4 times higher than its MSL counterpart @ 65[Formula: see text]GHz. A CPW structure, with an optimized ground-equalizing metal strip density to achieve the highest inductive quality factor, is therefore a preferred choice for the design of MMW interconnects, compared to an MSL. The LNA achieves a measured forward gain of [Formula: see text][Formula: see text]dB with good input and output impedance matching of better than [Formula: see text][Formula: see text]dB in the desired frequency range. Covering a chip area of 1256[Formula: see text][Formula: see text]m[Formula: see text]m including the pads, the LNA dissipates a power of only 16.2[Formula: see text]mW.

scholarly journals A 60 GHz fully differential LNA in 90 nm CMOS technology

2013 ◽  
Vol 6 (2) ◽  
pp. 109-113 ◽  
Author(s):  
Andrea Malignaggi ◽  
Amin Hamidian ◽  
Georg Boeck
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Transmission Lines ◽  
Noise Figure ◽  
Design Procedure ◽  
Cmos Technology ◽  
High Gain ◽  
Low Noise ◽  
60 Ghz ◽  
Fully Differential

The present paper presents a fully differential 60 GHz four stages low-noise amplifier for wireless applications. The amplifier has been optimized for low-noise, high-gain, and low-power consumption, and implemented in a 90 nm low-power CMOS technology. Matching and common-mode rejection networks have been realized using shielded coplanar transmission lines. The amplifier achieves a peak small-signal gain of 21.3 dB and an average noise figure of 5.4 dB along with power consumption of 30 mW and occupying only 0.38 mm2pads included. The detailed design procedure and the achieved measurement results are presented in this work.

scholarly journals Design of Low Power UWB CMOS Low Noise Amplifier using Active Inductor for WLAN Receiver

2018 ◽  
Vol 7 (2.24) ◽  
pp. 448
Author(s):  
S Manjula ◽  
M Malleshwari ◽  
M Suganthy
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Wide Band ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Design System ◽  
Active Inductor ◽  
Chip Area ◽  
Noise Amplifier

This paper presents a low power Low Noise Amplifier (LNA) using 0.18µm CMOS technology for ultra wide band (UWB) applications. gm boosting common gate (CG) LNA is designed to improve the noise performance.  For the reduction of on chip area, active inductor is employed at the input side of the designed LNA for input impedance matching. The proposed UWB LNA is designed using Advanced Design System (ADS) at UWB frequency of 3.1-10.6 GHz. Simulation results show that the gain of 10.74+ 0.01 dB, noise figure is 4.855 dB, input return loss <-13 dB and 12.5 mW power consumption.  

scholarly journals Influence of ASE Noise on Performance of DWDM Networks Using Low-power Pumped Raman Amplifiers

2015 ◽  
Vol 25 (2) ◽  
pp. 147
Author(s):  
Bui Trung Ninh ◽  
Nguyen Quoc Tuan ◽  
Ta Viet Hung ◽  
Nguyen The Anh ◽  
Pham Van Hoi
Keyword(s):  
Low Power ◽  
Wavelength Division Multiplexing ◽  
Bit Error Rate ◽  
Error Rate ◽  
Network Performance ◽  
Noise Figure ◽  
Chromatic Dispersion ◽  
Low Noise ◽  
Wavelength Division ◽  
Raman Amplifiers

We present the results of investigation  for  influence of amplified spontaneous emission (ASE) noise, noise figure (NF) and  chromatic dispersion on the performance of middle-distance Dense-wavelength-division-multiplexing (DWDM) networks using low-power pumped distributed Raman amplifiers (DRAs) in two different pump configurations, i.e., forward and backward pumping. We found that the pumping configurations, ASE noise, and dispersion play an important role for improving network performance by decrease of noise figure and bit error rate (BER) of the system. Simulation results show that the lowest bit error rate and low noise figure were obtained, when using forward pumping configuration. Moreover, we have also compared ASE noise powers of the simulation with these of the experiment. These results conclude that DRA with low pump power  ($<1$~W) is the promising key technology for short-- and/or middle-distance DWDM transmission networks.

scholarly journals A 1 to 32 GHz broadband multi-octave receiver for monolithic integrated vector network analyzers in SiGe technology

2018 ◽  
Vol 10 (5-6) ◽  
pp. 717-728
Author(s):  
Marco Dietz ◽  
Andreas Bauch ◽  
Klaus Aufinger ◽  
Robert Weigel ◽  
Amelie Hagelauer
Keyword(s):  
Noise Figure ◽  
Gain Control ◽  
Wide Frequency Range ◽  
Low Noise ◽  
Vector Network Analyzer ◽  
Ultra Wideband ◽  
Network Analyzer ◽  
Active Mixer ◽  
Input Matching ◽  
Better Than

AbstractA multi-octave receiver chain is presented for the use in a monolithic integrated vector network analyzer. The receiver exhibits a very wide frequency range of 1–32 GHz, where the gain meets the 3 dB-criterion. The differential receiver consists of an ultra-wideband low noise amplifier, an active mixer and an output buffer and exhibits a maximum conversion gain (CG) of 16.6 dB. The main design goal is a very flat CG over five octaves, which eases calibration of the monolithic integrated vector network analyzer. To realize variable gain functionality, without losing much input matching, an extended gain control circuit with additional feedback branch is shown. For the maximum gain level, a matching better than −10 dB is achieved between 1–28 GHz, and up to 30.5 GHz the matching is better than −8.4 dB. For both, the input matching and the gain of the LNA, the influence of the fabrication tolerances are investigated. A second gain control is implemented to improve isolation. The measured isolations between RF-to-LO and LO-to-RF are better than 30 dB and 60 dB, respectively. The LO-to-IF isolation is better than 35 dB. The noise figure of the broadband receiver is between 4.6 and 5.8 dB for 4–32 GHz and the output referred 1-dB-compression-point varies from 0.1 to 4.3 dBm from 2–32 GHz. The receiver draws a current of max. 66 mA at 3.3 V.

Design Analysis of Inductorless Active Loaded Low Power UWB LNA Using Noise Cancellation Technique

Frequenz ◽  
2020 ◽  
Vol 74 (3-4) ◽  
pp. 137-144 ◽  
Author(s):  
Dheeraj Kalra ◽  
Manish Kumar ◽  
Aasheesh Shukla ◽  
Laxman Singh ◽  
Zainul Abdin Jaffery
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Broad Band ◽  
Wide Band ◽  
Cmos Technology ◽  
Noise Cancellation ◽  
Low Noise ◽  
Design Analysis ◽  
Common Source ◽  
Power Gain

AbstractThis paper includes a design analysis of an inductorless low-power (LP) low-noise amplifier (LNA) with active load for Ultra Wide Band (UWB) applications. The proposed LNA consists of two parallel paths, one is the common source (CS) path and second is the CG path. The CG path has the edge advantage of improving overall Noise figure (NF) due to wide band impedance matching in UWB, while the CS path provides high power gain. A method for noise cancellation is adopted, to reduce the noise of CS path with the help of CG path. The proposed LNA successfully simulated in 90 nm CMOS technology. The results of proposed work indicate optimization at frequency 5.70 GHz with 3 dB bandwidth of 4.3 GHz–8.9 GHz. All simulations have been done for a range of frequency 03 GHz–13 GHz in Cadence virtuoso software. The results quoted 1.15 dB NF, −18.12 dB S11, 13.7 dB S21, maximum operating power gain (GP) 11.756 dB at frequency 5.7 GHz and available power gain (GA) is 10.17 dB at frequency 8.61 GHz, with 0.6 V, 0.92 mW broad band LNA.

Design and modeling of an ultra-wideband low-noise distributed amplifier in InP DHBT technology

2019 ◽  
Vol 11 (7) ◽  
pp. 635-644 ◽  
Author(s):  
T. Shivan ◽  
E. Kaule ◽  
M. Hossain ◽  
R. Doerner ◽  
T. Johansen ◽  
...  
Keyword(s):  
Noise Figure ◽  
Impedance Matching ◽  
Low Noise ◽  
Ultra Wideband ◽  
Frequency Range ◽  
Collector Current ◽  
Noise Sources ◽  
Distributed Amplifier ◽  
Double Heterojunction ◽  
High Bandwidth

AbstractThis paper reports on an ultra-wideband low-noise distributed amplifier (LNDA) in a transferred-substrate InP double heterojunction bipolar transistor (DHBT) technology which exhibits a uniform low-noise characteristic over a large frequency range. To obtain very high bandwidth, a distributed architecture has been chosen with cascode unit gain cells. Each unit cell consists of two cascode-connected transistors with 500 nm emitter length and ft/fmax of ~360/492 GHz, respectively. Due to optimum line-impedance matching, low common-base transistor capacitance, and low collector-current operation, the circuit exhibits a low-noise figure (NF) over a broad frequency range. A 3-dB bandwidth from 40 to 185 GHz is measured, with an NF of 8 dB within the frequency range between 75 and 105 GHz. Moreover, this circuit demonstrates the widest 3-dB bandwidth operation among all reported single-stage amplifiers with a cascode configuration. Additionally, this work has proposed that the noise sources of the InP DHBTs are largely uncorrelated. As a result, a reliable prediction can be done for the NF of ultra-wideband circuits beyond the frequency range of the measurement equipment.

scholarly journals Wide-Band Tunerless Mixer Mounts for 100 GHz and 150 GHz SIS receivers

1994 ◽  
Vol 140 ◽  
pp. 78-81
Author(s):  
K. Sunada ◽  
R. Kawabe ◽  
J. Inatani
Keyword(s):  
Noise Temperature ◽  
Wide Band ◽  
Wide Frequency Range ◽  
Low Noise ◽  
Frequency Range ◽  
Sis Receiver ◽  
Embedding Impedance

AbstractThe performance of the new SIS receiver systems at the Nobeyama Millimeter Array are described. These receivers operate at 100 GHz and 150 GHz bands and tunerless mixer mounts have been adopted. These receivers show very low noise temperature (< 50 K) over a very wide frequency range because of the large embedding impedance range.

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