Fault diagnosis and fault localisation in integrated circuit by thermal method

2001 ◽  
Author(s):  
P. Bratek ◽  
A. Kos
Keyword(s):  
Fault Diagnosis ◽  
Integrated Circuit ◽  
Thermal Method

scholarly journals Wavelet-Based Feature Extraction in Fault Diagnosis for Biquad High-Pass Filter Circuit

2016 ◽  
Vol 2016 ◽  
pp. 1-13 ◽  
Author(s):  
Yuehai Wang ◽  
Yongzheng Yan ◽  
Qinyong Wang
Keyword(s):  
Feature Extraction ◽  
Fault Diagnosis ◽  
Integrated Circuits ◽  
Analog Circuits ◽  
Integrated Circuit ◽  
Analog Circuit ◽  
Pass Filter ◽  
Op Amp ◽  
Biquad Filter ◽  
Feature Extraction And Selection

Fault diagnosis for analog circuit has become a prominent factor in improving the reliability of integrated circuit due to its irreplaceability in modern integrated circuits. In fact fault diagnosis based on intelligent algorithms has become a popular research topic as efficient feature extraction and selection are a critical and intricate task in analog fault diagnosis. Further, it is extremely important to propose some general guidelines for the optimal feature extraction and selection. In this paper, based on wavelet analysis, we will study the problems of mother wavelets selection, number of decomposition levels, and candidate coefficients selection by using a four-op-amp biquad filter circuit. After conducting several comparative experiments, some general guidelines for feature extraction for this type of analog circuits fault diagnosis are derived.

scholarly journals Secure Fault Diagnosis for Framework on Chip Design and Testing

2020 ◽  
Vol 9 (5) ◽  
pp. 715-720
Keyword(s):  
Fault Diagnosis ◽  
Circuit Design ◽  
Integrated Circuit ◽  
Research Paper ◽  
Verilog Hdl ◽  
Integrated Circuit Design ◽  
Chip Design ◽  
Cell Plan ◽  
On Chip ◽  
Design And Testing

Because of the extensive expense of semiconductor fabricating, most framework on-chip structure organizations redistribute their generation to seaward foundries. As a large portion of these gadgets are fabricated in situations of constrained trust that regularly need suitable oversight, various diverse dangers have risen. These incorporate unapproved overabundance of the ICs, offer of out-of-determination/rejected ICs disposed of by assembling tests, robbery of scholarly property, and figuring out of the structures. The Boolean calculations are effectively break keybased confusion techniques and therefore go around the essential destinations of metering and confusion. In this research paper, we present an innovation secure cell plan for executing the structure for-security foundation to avoid releasing the way to a foe under any conditions and produce fault free integrated circuit design. Our proposed structure is impervious to different known assaults at the expense of a next to no region overhead. This Proposed Framework Actualized utilizing Verilog HDL also recreated by Modelsim 6.4 c and Integrated by Xilinx device.

scholarly journals Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuits

2012 ◽  
Vol 60 (1) ◽  
pp. 133-142 ◽  
Author(s):  
P. Jantos ◽  
D. Grzechca ◽  
J. Rutkowski
Keyword(s):  
Fault Diagnosis ◽  
Integrated Circuits ◽  
Evolutionary Algorithms ◽  
Integrated Circuit ◽  
Gene Expression Programming ◽  
Band Pass Filter ◽  
Pass Filter ◽  
Parametric Fault ◽  
Diagnosis Method ◽  
Analogue Integrated Circuits

Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuitsAn evolutionary method for analogue integrated circuits diagnosis is presented in this paper. The method allows for global parametric faults localization at the prototype stage of life of an analogue integrated circuit. The presented method is based on the circuit under test response base and the advanced features classification. A classifier is built with the use of evolutionary algorithms, such as differential evolution and gene expression programming. As the proposed diagnosis method might be applied at the production phase there is a method for shortening the diagnosis time suggested. An evolutionary approach has been verified with the use of several exemplary circuits - an oscillator, a band-pass filter and two operational amplifiers. A comparison of the presented algorithm and two classical methods - the linear classifier and the nearest neighborhood method - proves that the heuristic approach allows for acquiring significantly better results.

The Precipitation of Si in AlCuSi Thin Films

1973 ◽  
Vol 31 ◽  
pp. 34-35 ◽  
Author(s):  
R. M. Anderson
Keyword(s):  
Electron Microscopy ◽  
Thin Films ◽  
Heat Treatment ◽  
Solid Solution ◽  
Integrated Circuit ◽  
Copper Film ◽  
Solution Concentration ◽  
X Ray ◽  
Silicon Thin Films ◽  
Before And After

Aluminum-copper-silicon thin films have been considered as an interconnection metallurgy for integrated circuit applications. Various schemes have been proposed to incorporate small percent-ages of silicon into films that typically contain two to five percent copper. We undertook a study of the total effect of silicon on the aluminum copper film as revealed by transmission electron microscopy, scanning electron microscopy, x-ray diffraction and ion microprobe techniques as a function of the various deposition methods.X-ray investigations noted a change in solid solution concentration as a function of Si content before and after heat-treatment. The amount of solid solution in the Al increased with heat-treatment for films with ≥2% silicon and decreased for films <2% silicon.

Characterization of RF Sputtered ZnO Piezoelectric Films Using Transmission Electron Microscope

1975 ◽  
Vol 33 ◽  
pp. 86-87
Author(s):  
Kemining W. Yeh ◽  
Richard S. Muller ◽  
Wei-Kuo Wu ◽  
Jack Washburn
Keyword(s):  
Integrated Circuit ◽  
Acoustic Waves ◽  
New Technology ◽  
Surface Acoustic Waves ◽  
Electromechanical Properties ◽  
Leading Role ◽  
Saw Devices ◽  
Transmission Electron ◽  
High Degree

Considerable and continuing interest has been shown in the thin film transducer fabrication for surface acoustic waves (SAW) in the past few years. Due to the high degree of miniaturization, compatibility with silicon integrated circuit technology, simplicity and ease of design, this new technology has played an important role in the design of new devices for communications and signal processing. Among the commonly used piezoelectric thin films, ZnO generally yields superior electromechanical properties and is expected to play a leading role in the development of SAW devices.

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