Test Scenarios Generation Using UML Sequence Diagram

Author(s):  
Satya Sobhan Panigrahi ◽  
Shreshtha Shaurya ◽  
Pramita Das ◽  
Anil Kumar Swain ◽  
Ajay Kumar Jena
2009 ◽  
Vol 8 (2) ◽  
pp. 120-136 ◽  
Author(s):  
Shaohua Xie ◽  
Eileen Kraemer ◽  
R. E. K. Stirewalt ◽  
Laura K Dillon ◽  
Scott D Fleming

Learning about concurrency and synchronization is difficult for novices. Our research seeks to support and improve the teaching and learning of concurrency concepts and to improve comprehension of the intricacies of multiple thread interactions. This paper describes a series of empirical studies in the first phase of our research. We began by conducting a comparative study to empirically evaluate the usability by novices of the existing variants of the UML sequence diagram notation in solving comprehension tasks involving multiple thread interactions. The results implied that a deliberately designed variant of this notation may provide better support for reasoning about concurrent behavior. We then investigated the factors that complicate learning, with the idea that the same complexities would also complicate comprehension tasks. In order to understand the practical difficulties novices encounter in learning about concurrency, we conducted an instructor interview and an observational study. These investigations guided us in determining the desirable properties of a new notation. We then designed synchronization-adorned UML (saUML) sequence diagrams, which extend UML sequence diagrams with those properties. Finally, we performed four empirical studies to evaluate the usability and efficacy of saUML. Through these empirical studies, we were able to validate the benefits of saUML in enhancing novices' understanding of programs with different levels of synchronization complexity.


Author(s):  
Vierdy Sulfianto Rahmadani ◽  
Indra Kharisma Raharjana ◽  
Taufik Taufik

Abstrak—Tujuan penelitian ini adalah penerapan reverse engineering untuk penentuan pola interaksi Sequence diagram yang bisa digunakan oleh sistem analis sebagai pola templateuntuk mendesain UML sequence diagram. Aplikasi yang digunakan sebagai data dasar berasal dari aplikasi contoh milik Android, aplikasi inilah yang mengalami proses reverse engineering dan teridentifikasi polanya. Tahap pertama yang dilakukan dalam penentuan pola interaksi ini adalah pengumpulan aplikasi dataset. Tahapan selanjutnya adalah identifikasi fitur dan aktifitas aplikasi, melakukan reverse engineeringsehingga didapatkan model sequence diagram,kemudian melakukan sistesis semua model tersebut menjadi pola interaksi sequence diagram. Langkah terakhir adalah menguji pola tersebut dengan menerapkannya dalam pembangunan aplikasi studi kasus. Berdasarkan hasil evaluasi, disimpulkan bahwa pola interaksi pada sequence diagram yang didapatkan dari penelitian ini dapat diterapkan pada perancangan perangkat lunak yang memiliki fitur-fitur yang sama dengan fitur-fitur yang terdapat pada penelitian ini. Kata Kunci— Reverse Engineering, Pola Interaksi, Sequence Diagram, AndroidAbstract—The purpose of this research is to apply the application of reverse engineering to determine interaction patterns of the Sequence diagram that can be used by system analysts as a template for designing UML sequence diagrams. Sample applications from android are used as dataset for reverse engineering and pattern identification. The first step is collecting application datasets. The next stage is identifying the features and applications activity, reverse engineering to obtain a sequence diagram model, and then synthesize all of the models into an interaction pattern of sequence diagram. The final step is to test the patterns by implementing it in an application development case stud. The evaluation results concludes that interaction patterns of sequence diagram designs obtained in reverse engineering steps is able to be implemented in software development that contained similar features with the obtained features in this research. Keywords— Reverse Engineering, Interaction Pattern, Sequence Diagram, Android


Computers ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 94
Author(s):  
Tanuja Shailesh ◽  
Ashalatha Nayak ◽  
Devi Prasad

Performance is a critical non-functional parameter for real-time systems and performance analysis is an important task making it more challenging for complex real-time systems. Mostly performance analysis is performed after the system development but an early stage analysis and validation of performance using system models can improve the system quality. In this paper, we present an early stage automated performance evaluation methodology to analyse system performance using the UML sequence diagram model annotated with modeling and analysis of real-time and embedded systems (MARTE) profile. MARTE offers a performance domain sub-profile that is used for representing real-time system properties essential for performance evaluation. In this paper, a transformation technique and transformation rules are proposed to map the UML sequence diagram model into a Generalized Stochastic Timed Petri net model. All the transformation rules are implemented using a metamodel based approach and Atlas Transformation Language (ATL). A case study from the manufacturing domain a Kanban system is used for validating the proposed technique.


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