The System Design of Low Power Electronic Pipette

2010 ◽  
Author(s):  
Chen Xianzhong ◽  
Hou Qingwen ◽  
Lu Yifang
Keyword(s):  
Low Power ◽  
System Design ◽  
Power Electronic

scholarly journals A Novel Technique for Low-Power Electronic System Design

2016 ◽  
Author(s):  
Evelyn Sowells ◽  
Cameron Seay ◽  
Dewayne Brown
Keyword(s):  
Low Power ◽  
System Design ◽  
Electronic System ◽  
Power Electronic ◽  
Novel Technique

scholarly journals Low-power electronic technologies for harsh radiation environments

2021 ◽  
Vol 4 (4) ◽  
pp. 243-253
Author(s):  
Jeffrey Prinzie ◽  
Firman Mangasa Simanjuntak ◽  
Paul Leroux ◽  
Themis Prodromakis
Keyword(s):  
Low Power ◽  
Power Electronic ◽  
Electronic Technologies

Environment and Application Testbed for Low-Power Energy Harvesting System Design

2020 ◽  
pp. 1-1
Author(s):  
Lukas Sigrist ◽  
Andres Gomez ◽  
Matthias Leubin ◽  
Jan Beutel ◽  
Lothar Thiele
Keyword(s):  
Energy Harvesting ◽  
Low Power ◽  
System Design ◽  
Energy Harvesting System

scholarly journals Failure modes and reliability oriented system design for aerospace power electronic converters

2020 ◽  
pp. 1-1
Author(s):  
Jayakrishnan Harikumaran ◽  
Giovanni Migliazza ◽  
Giampaolo Buticchi ◽  
Vincenzo Madonna ◽  
Paolo Giangrande ◽  
...  
Keyword(s):  
System Design ◽  
Failure Modes ◽  
Power Electronic ◽  
Power Electronic Converters ◽  
Oriented System

A Bandwidth-Dense, Low Power Electronic-Photonic Platform and Architecture for Multi-Tbps Optical I/O

2018 ◽  
Author(s):  
Mark Wade ◽  
Michael Davenport ◽  
Marc De Cea Falco ◽  
Pavan Bhargava ◽  
John Fini ◽  
...  
Keyword(s):  
Low Power ◽  
Power Electronic

scholarly journals Design of Power Efficient 32-Bit Processing Unit

2018 ◽  
Vol 7 (2.16) ◽  
pp. 52
Author(s):  
Dharmavaram Asha Devi ◽  
Chintala Sandeep ◽  
Sai Sugun L
Keyword(s):  
Low Power ◽  
System Design ◽  
Power Analysis ◽  
Low Power Design ◽  
Design Flow ◽  
Processing Unit ◽  
Verilog Hdl ◽  
Power Efficient ◽  
Front End ◽  
Verification Process

The proposed paper is discussed about the design, verification and analysis of a 32-bit Processing Unit.  The complete front-end design flow is processed using Xilinx Vivado System Design Suite software tools and target verification is done by using Artix 7 FPGA. Virtual I/O concept is used for the verification process. It will perform 32 different operations including parity generation and code conversions: Binary to Grey and Grey to Binary. It is a low power design implemented with Verilog HDL and power analysis is implementedwith clock frequencies ranging from 10MhZ to 100GhZ. With all these frequencies, power analysis is verified for different I/O standards LVCMOS12, LVCMOS25 and LVCMOS33.  

scholarly journals Low-Power Wireless With Denseness: The Case of an Electronic Shelf Labeling System—Design and Experience

IEEE Access ◽  
2019 ◽  
Vol 7 ◽  
pp. 163887-163897 ◽  
Author(s):  
Jinwoo Ock ◽  
Hongchan Kim ◽  
Hyung-Sin Kim ◽  
Jeongyeup Paek ◽  
Saewoong Bahk
Keyword(s):  
Low Power ◽  
System Design ◽  
Labeling System
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