Signed Booth Multiplier using Redundant-Binary-Number System

The article describes a number of little-known methods for translating natural numbers from one number system to another. The first is a method for converting large numbers from the decimal system to the binary system, based on multiple divisions of a given number and all intermediate quotients by 64 (or another number equal to 2n ), followed by writing the last quotient and the resulting remainders in binary form. Then two methods of mutual translation of decimal and binary numbers are described, based on the so-called «Horner scheme». An optimal variant of converting numbers into the binary number system by the method of division by 2 is also given. In conclusion, a fragment of a manuscript from the beginning of the late 16th — early 17th centuries is published with translation into the binary system by the method of highlighting the maximum degree of number 2. Assignments for independent work of students are offered.

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An efficient redundant-binary number to binary number converter

IEEE Journal of Solid-State Circuits ◽

10.1109/4.109563 ◽

1992 ◽

Vol 27 (1) ◽

pp. 109-112 ◽

Cited By ~ 27

Author(s):

Sung-Ming Yen ◽

Chi-Sung Laih ◽

Chin-Hsing Chen ◽

Jau-Yien Lee

Keyword(s):

Binary Number ◽

Redundant Binary Number

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Complex Binary Number System-based Co-Processor Design for Signal Processing Applications

10.1109/iementech53263.2021.9614893 ◽

2021 ◽

Author(s):

Sudia Sai Santosh ◽

Tandyala Sai Swaroop ◽

Tangudu Kavya ◽

Ramesh Chinthala

Keyword(s):

Signal Processing ◽

Number System ◽

Binary Number ◽

Processor Design

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Decimal Hardware Multiplier

Encyclopedia of Information Science and Technology, Fourth Edition ◽

10.4018/978-1-5225-2255-3.ch400 ◽

2018 ◽

pp. 4607-4618

Author(s):

Mário Pereira Vestias

Keyword(s):

Number System ◽

Floating Point ◽

Binary Number ◽

Correct Result ◽

Fundamental Operation ◽

Floating Point Arithmetic ◽

Decimal Arithmetic ◽

Decimal Numbers ◽

Decimal Multiplication ◽

Point Arithmetic

IEEE-754 2008 has extended the standard with decimal floating point arithmetic. Human-centric applications, like financial and commercial, depend on decimal arithmetic since the results must match exactly those obtained by human calculations without being subject to errors caused by decimal to binary conversions. Decimal Multiplication is a fundamental operation utilized in many algorithms and it is referred in the standard IEEE-754 2008. Decimal multiplication has an inherent difficulty associated with the representation of decimal numbers using a binary number system. Both bit and digit carries, as well as invalid results, must be considered in decimal multiplication in order to produce the correct result. This article focuses on algorithms for hardware implementation of decimal multiplication. Both decimal fixed-point and floating-point multiplication are described, including iterative and parallel solutions.

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Decimal Hardware Multiplier

Advanced Methodologies and Technologies in Artificial Intelligence, Computer Simulation, and Human-Computer Interaction - Advances in Computer and Electrical Engineering ◽

10.4018/978-1-5225-7368-5.ch054 ◽

2019 ◽

pp. 722-736

Author(s):

Mário Pereira Vestias

Keyword(s):

Number System ◽

Floating Point ◽

Binary Number ◽

Correct Result ◽

Fundamental Operation ◽

Floating Point Arithmetic ◽

Decimal Arithmetic ◽

Decimal Numbers ◽

Decimal Multiplication ◽

Point Arithmetic

IEEE-754 2008 has extended the standard with decimal floating-point arithmetic. Human-centric applications, like financial and commercial, depend on decimal arithmetic since the results must match exactly those obtained by human calculations without being subject to errors caused by decimal to binary conversions. Decimal multiplication is a fundamental operation utilized in many algorithms, and it is referred in the standard IEEE-754 2008. Decimal multiplication has an inherent difficulty associated with the representation of decimal numbers using a binary number system. Both bit and digit carries, as well as invalid results, must be considered in decimal multiplication in order to produce the correct result. This chapter focuses on algorithms for hardware implementation of decimal multiplication. Both decimal fixed-point and floating-point multiplication are described, including iterative and parallel solutions.

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