Design and implementation for IC card file system power-down protection

2010 ◽  
Author(s):  
Bin Zheng ◽  
Zheng Li
Keyword(s):  
File System ◽  
Ic Card ◽  
Design And Implementation ◽  
System Power

Design of SD Card Driver and Tiny FS for Multi-Process Micro-Kernel Embedded OS on ARM

2013 ◽  
Vol 756-759 ◽  
pp. 4207-4211
Author(s):  
Bo Qu
Keyword(s):  
File System ◽  
Device Driver ◽  
Embedded Operating System ◽  
Tool Chain ◽  
Embedded Os ◽  
Design And Implementation ◽  
System A ◽  
Technical Details ◽  
Sd Card ◽  
Key Techniques

This paper describes the design and implementation of SD card driver and tiny file system for multi-process micro-kernel embedded operating system on ARM in technical details, including structure of device driver, key techniques of designing SD card driver, architecture of the tiny file system, a brief description of its designing and a demo example. The SD card driver and tiny FS are implemented with GNU tool chain by the author of this paper. Practice proves that the system can be used for not only embedded application developments but also related curriculum teaching.

Design of Tiny TTY for ARM Based Multi-Process Mono-Kernel

2013 ◽  
Vol 373-375 ◽  
pp. 1587-1590
Author(s):  
Bo Qu
Keyword(s):  
Operating System ◽  
Data Structure ◽  
Network Management ◽  
File System ◽  
Embedded Operating System ◽  
Tool Chain ◽  
Design And Implementation

This paper describes the design and implementation of tiny TTY for an ARM based multi-process mono-kernel, including overview of TTY, and implementation of the TTY routines such as data structure of TTY, TTY input, TTY read, TTY write, TTY waiting and TTY signal setting. A demo example is also provided at the final of the paper to show the effect. The mono-kernel is developed by the author of this paper on Linux with GNU tool chain from scratch, for which the tiny TTY is designed. Based on this mono-kernel, other components can be added such as file system, network management, etc. to form a more powerful embedded operating system.

The Design and Implementation of a Heterogeneous Multi-Core Security Chip Architecture Based on Shared Memory System

2014 ◽  
Vol 668-669 ◽  
pp. 1314-1318
Author(s):  
Lei Zhang ◽  
Ren Ping Dong ◽  
Chang Zhang ◽  
Ya Ping Yu
Keyword(s):  
Low Power ◽  
Computer Architecture ◽  
Shared Memory ◽  
High Performance ◽  
Stream Cipher ◽  
Ic Card ◽  
Task Partitioning ◽  
Core System ◽  
Design And Implementation ◽  
Encryption And Decryption

With the existence of traditional SOC chip, the encryption and decryption speed and low power cannot meet the computing needs of the modern diversity, then we present a heterogeneous multi-core system which designed based on shared memory on the Xilinx Virtex-5 platform. This paper is in-depth research about heterogeneous multi-core password architecture, static task partitioning, scheduling strategy and the communication mechanism between cores. The three cores systems are designed and builded based on shared memory to realize ZUC algorithm which generates a stream cipher on virtex-5 platform. The three microblaze cores are responsible for inter-core communication, the implementation of ZUC algorithm and articulating IC card to read keys. Through the design of three cores system, give full play to the hardware, software and computer architecture parallelism at all levels to improve the performance of the algorithm to achieve high performance green computing.

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