scholarly journals Challenges in the formal verification of complete state-of-the-art processors

2006 ◽  
Author(s):  
N. Ayewah ◽  
N. Kikkeri ◽  
P.M. Seidel ◽  
S. Beyer
Keyword(s):  
Formal Verification ◽  
State Of The Art ◽  
Complete State

scholarly journals Grasping Assisting Algorithm in Tele-Operated Robotic Gripper

2021 ◽  
Vol 11 (6) ◽  
pp. 2640
Author(s):  
Tomer Fine ◽  
Guy Zaidner ◽  
Amir Shapiro
Keyword(s):  
State Of The Art ◽  
Human Subjects ◽  
Quality Measures ◽  
Human Operator ◽  
Physical Presence ◽  
Complete State ◽  
The Future ◽  
Power Grasp ◽  
Grasp Quality

The involvement of Robots and automated machines in different industries has increased drastically in recent years. Part of this revolution is accomplishing tasks previously performed by humans with advanced robots, which would replace the entire human workforce in the future. In some industries the workers are required to complete different operations in hazardous or difficult environments. Operations like these could be replaced with the use of tele-operated systems that have the capability of grasping objects in their surroundings, thus abandoning the need for the physical presence of the human operator at the area while still allowing control. In this research our goal is to create an assisting system that would improve the grasping of a human operator using a tele-operated robotic gripper and arm, while advising the operator but not forcing a solution. For a given set of objects we computed the optimal grasp to be achieved by the gripper, based on two grasp quality measures of our choosing (namely power grasp and precision grasp). We then tested the performance of different human subjects who tried to grasp the different objects with the tele-operated system, while comparing their success to unassisted and assisted grasping. Our goal is to create an assisting algorithm that would compute optimal grasps and might be integrated into a complete, state-of-the-art tele-operated system.

scholarly journals Model-Checking Speculation-Dependent Security Properties: Abstracting and Reducing Processor Models for Sound and Complete Verification

Electronics ◽  
2019 ◽  
Vol 8 (9) ◽  
pp. 1057
Author(s):  
Gianpiero Cabodi ◽  
Paolo Camurati ◽  
Fabrizio Finocchiaro ◽  
Danilo Vendraminetto
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
High Performance ◽  
State Of The Art ◽  
Realistic Model ◽  
Bounded Model Checking ◽  
Sensitive Information ◽  
Model Checker ◽  
Verification Process ◽  
Verification Techniques

Spectre and Meltdown attacks in modern microprocessors represent a new class of attacks that have been difficult to deal with. They underline vulnerabilities in hardware design that have been going unnoticed for years. This shows the weakness of the state-of-the-art verification process and design practices. These attacks are OS-independent, and they do not exploit any software vulnerabilities. Moreover, they violate all security assumptions ensured by standard security procedures, (e.g., address space isolation), and, as a result, every security mechanism built upon these guarantees. These vulnerabilities allow the attacker to retrieve leaked data without accessing the secret directly. Indeed, they make use of covert channels, which are mechanisms of hidden communication that convey sensitive information without any visible information flow between the malicious party and the victim. The root cause of this type of side-channel attacks lies within the speculative and out-of-order execution of modern high-performance microarchitectures. Since modern processors are hard to verify with standard formal verification techniques, we present a methodology that shows how to transform a realistic model of a speculative and out-of-order processor into an abstract one. Following related formal verification approaches, we simplify the model under consideration by abstraction and refinement steps. We also present an approach to formally verify the abstract model using a standard model checker. The theoretical flow, reliant on established formal verification results, is introduced and a sketch of proof is provided for soundness and correctness. Finally, we demonstrate the feasibility of our approach, by applying it on a pipelined DLX RISC-inspired processor architecture. We show preliminary experimental results to support our claim, performing Bounded Model-Checking with a state-of-the-art model checker.

scholarly journals State of the Art in the Research of Formal Verification

2014 ◽  
Vol 15 (4) ◽  
pp. 615-623 ◽  
Author(s):  
Serna-M. Edgar ◽  
Morales-V. David
Keyword(s):  
Formal Verification ◽  
State Of The Art

A Formal Verification Centred Development Process for Security Protocols

2009 ◽  
pp. 165-178 ◽  
Author(s):  
Tom Coffey
Keyword(s):  
Formal Verification ◽  
Communication Systems ◽  
Development Process ◽  
State Of The Art ◽  
Security Protocols ◽  
Security Protocol ◽  
Current State ◽  
Reliable Design

This chapter concerns the correct and reliable design of modern security protocols. It discusses the importance of formal verification of security protocols prior to their release by publication or implementation. A discussion on logic-based verification of security protocols and its automation provides the reader with an overview of the current state-of-the-art of formal verification of security protocols. The authors propose a formal verification centred development process for security protocols. This process provides strong confidence in the correctness and reliability of the designed protocols. Thus, the usage of weak security protocols in communication systems is prevented. A case-study on the development of a security protocol demonstrates the advantages of the proposed approach. The case-study concludes with remarks on the performance of automated logic-based verification and presents an overview of formal verification results of a range of modern security protocols.

scholarly journals Counterexample-Guided Strategy Improvement for POMDPs Using Recurrent Neural Networks

2019 ◽  
Author(s):  
Steven Carr ◽  
Nils Jansen ◽  
Ralf Wimmer ◽  
Alexandru Serban ◽  
Bernd Becker ◽  
...  
Keyword(s):  
Formal Verification ◽  
Temporal Logic ◽  
State Of The Art ◽  
Decision Processes ◽  
Finite Markov Chain ◽  
Markov Decision ◽  
Novel Method ◽  
Finite Memory ◽  
Partially Observable ◽  
Verification Techniques

We study strategy synthesis for partially observable Markov decision processes (POMDPs). The particular problem is to determine strategies that provably adhere to (probabilistic) temporal logic constraints. This problem is computationally intractable and theoretically hard. We propose a novel method that combines techniques from machine learning and formal verification. First, we train a recurrent neural network (RNN) to encode POMDP strategies. The RNN accounts for memory-based decisions without the need to expand the full belief space of a POMDP. Secondly, we restrict the RNN-based strategy to represent a finite-memory strategy and implement it on a specific POMDP. For the resulting finite Markov chain, efficient formal verification techniques provide provable guarantees against temporal logic specifications. If the specification is not satisfied, counterexamples supply diagnostic information. We use this information to improve the strategy by iteratively training the RNN. Numerical experiments show that the proposed method elevates the state of the art in POMDP solving by up to three orders of magnitude in terms of solving times and model sizes.

scholarly journals Efficient Strategies for CEGAR-Based Model Checking

2019 ◽  
Vol 64 (6) ◽  
pp. 1051-1091
Author(s):  
Ákos Hajdu ◽  
Zoltán Micskei
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
State Of The Art ◽  
Abstraction Refinement ◽  
Remarkable Improvement ◽  
Research Questions ◽  
Effectiveness And Efficiency ◽  
Efficient Verification ◽  
New Strategies

Abstract Automated formal verification is often based on the Counterexample-Guided Abstraction Refinement (CEGAR) approach. Many variants of CEGAR have been developed over the years as different problem domains usually require different strategies for efficient verification. This has lead to generic and configurable CEGAR frameworks, which can incorporate various algorithms. In our paper we propose six novel improvements to different aspects of the CEGAR approach, including both abstraction and refinement. We implement our new contributions in the Theta framework allowing us to compare them with state-of-the-art algorithms. We conduct an experiment on a diverse set of models to address research questions related to the effectiveness and efficiency of our new strategies. Results show that our new contributions perform well in general. Moreover, we highlight certain cases where performance could not be increased or where a remarkable improvement is achieved.

scholarly journals Verifying OpenJDK’s LinkedList using KeY

2020 ◽  
pp. 217-234 ◽  
Author(s):  
Hans-Dieter A. Hiep ◽  
Olaf Maathuis ◽  
Jinting Bian ◽  
Frank S. de Boer ◽  
Marko van Eekelen ◽  
...  
Keyword(s):  
Formal Verification ◽  
State Of The Art ◽  
Linked List ◽  
Corrected Version ◽  
Specification And Verification

Abstract As a particular case study of the formal verification of state-of-the-art, real software, we discuss the specification and verification of a corrected version of the implementation of a linked list as provided by the Java Collection framework.

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