Fault-tolerant architecture for high performance embedded system applications

The hardware security of embedded systems is raising more and more concerns in numerous safety-critical applications, such as in the automotive, aerospace, avionic, and railway systems. Embedded systems are gaining popularity in these safety-sensitive sectors with high performance, low power, and great reliability, which are ideal control platforms for executing instruction operation and data processing. However, modern embedded systems are still exposing many potential hardware vulnerabilities to malicious attacks, including software-level and hardware-level attacks; these can cause program execution failure and confidential data leakage. For this reason, this paper presents a novel embedded system by integrating a hardware-assisted security monitoring unit (SMU), for achieving a reinforced system-on-chip (SoC) on ensuring program execution and data processing security. This architecture design was implemented and evaluated on a Xilinx Virtex-5 FPGA development board. Based on the evaluation of the SMU hardware implementation in terms of performance overhead, security capability, and resource consumption, the experimental results indicate that the SMU does not lead to a significant speed degradation to processor while executing different benchmarks, and its average performance overhead reduces to 2.18% on typical 8-KB I/D-Caches. Security capability evaluation confirms the monitoring effectiveness of SMU against both instruction and data tampering attacks. Meanwhile, the SoC satisfies a good balance between high-security and resource overhead.

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Design and Implementation ofReal-time Electrical Stimulation Artifact Suppression based on STM32

Turkish Journal of Computer and Mathematics Education (TURCOMAT) ◽

10.17762/turcomat.v12i5.982 ◽

2021 ◽

Vol 12 (5) ◽

pp. 424-427

Author(s):

Sangsoo Park, Hojun Yeom

Keyword(s):

Central Nervous System ◽

Nervous System ◽

Electrical Stimulation ◽

Embedded System ◽

Muscle Contraction ◽

Real Time ◽

High Performance ◽

Floating Point ◽

Time Signal ◽

Central Nervous System Damage

A biosignal is used as a control signal for electrical stimulation to restore weakened muscle function due to damage to the central nervous system. In patients with central nervous system damage, sufficient muscle contraction does not occur spontaneously. In this case, applying electrical stimulation can cause normal muscle contraction. However, it is necessary to remove the electrical stimulation artifact caused by the electrical stimulation. This paper describes a system design that removes electrical stimulation artifact in real time using a Cortex-M4-based STM32F processor. The STM32F is a very advantageous MCU for such DSPs, especially because it has a built-in floating point operator. Using STM32F's various high-performance peripherals (12-bit parallel ADC and 12-bit DAC, UART, Timer), an optimized embedded system was implemented.In this paper, the simulated and real-time results were compared and evaluated with the designed fir filter. In addition, the performance of the filter was evaluated through frequency analysis. As a result, it was verified that a high-performance 32-bit STM32F with floating point calculator and various peripherals is suitable for real-time signal processing

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