An evaluation of asynchronous and synchronous design for superscalar architectures

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628882 ◽

2002 ◽

Author(s):

A. Davey ◽

D. Lloyd

Keyword(s):

Superscalar Architectures

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Improving instruction supply efficiency in superscalar architectures using instruction trace buffers

Proceedings of the 1992 ACM/SIGAPP symposium on Applied computing technological challenges of the 1990's - SAC '92 ◽

10.1145/143559.143579 ◽

1992 ◽

Author(s):

Chih-Po Wen

Keyword(s):

Improving Instruction ◽

Superscalar Architectures

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Evaluating signal processing and multimedia applications on SIMD, VLIW and superscalar architectures

Proceedings 2000 International Conference on Computer Design ◽

10.1109/iccd.2000.878283 ◽

2002 ◽

Cited By ~ 16

Author(s):

D. Talla ◽

L.K. John ◽

V. Lapinskii ◽

B.L. Evans

Keyword(s):

Signal Processing ◽

Multimedia Applications ◽

Superscalar Architectures

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Optimization of high-performance superscalar architectures for energy efficiency

ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514) ◽

10.1109/lpe.2000.155258 ◽

2000 ◽

Cited By ~ 17

Author(s):

V. Zyuban ◽

P. Kogge

Keyword(s):

Energy Efficiency ◽

High Performance ◽

Superscalar Architectures

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Predicting communication protocol performance on superscalar architectures using instruction dependency

Performance Evaluation ◽

10.1016/j.peva.2005.10.004 ◽

2006 ◽

Vol 63 (9-10) ◽

pp. 939-955 ◽

Cited By ~ 2

Author(s):

Tsai Chi Huang ◽

Linda M. Wills ◽

Roy W. Melton ◽

Cecil O. Alford

Keyword(s):

Communication Protocol ◽

Protocol Performance ◽

Superscalar Architectures

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Tuning the Domain Decomposition Solution Algorithm for Superscalar Architectures

Advances in Engineering Computational Technology ◽

10.4203/ccp.53.2.2 ◽

2009 ◽

Author(s):

G.P. Nikishkov ◽

H. Kanda ◽

A. Makinouchi

Keyword(s):

Domain Decomposition ◽

Solution Algorithm ◽

Superscalar Architectures

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Superscalar Architectures

Computer Architecture ◽

10.1002/9781118577431.ch13 ◽

2013 ◽

pp. 287-324

Author(s):

Gérard Blanchet ◽

Bertrand Dupouy

Keyword(s):

Superscalar Architectures

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Augmenting Modern Superscalar Architectures with Configurable Extended Instructions

Lecture Notes in Computer Science - Parallel and Distributed Processing ◽

10.1007/3-540-45591-4_129 ◽

2000 ◽

pp. 941-950 ◽

Cited By ~ 3

Author(s):

Xianfeng Zhou ◽

Margaret Martonosi

Keyword(s):

Superscalar Architectures

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Minimum register instruction sequencing to reduce register spills in out-of-order issue superscalar architectures

IEEE Transactions on Computers ◽

10.1109/tc.2003.1159750 ◽

2003 ◽

Vol 52 (1) ◽

pp. 4-20 ◽

Cited By ~ 22

Author(s):

R. Govindarajan ◽

Hongbo Yang ◽

J.N. Amaral ◽

Chihong Zhang ◽

G.R. Gao

Keyword(s):

Superscalar Architectures

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Instruction Scheduling for Superscalar Architectures

Annual Review of Computer Science ◽

10.1146/annurev.cs.04.060190.001133 ◽

1990 ◽

Vol 4 (1) ◽

pp. 173-201 ◽

Cited By ~ 10

Author(s):

M S Lam

Keyword(s):

Instruction Scheduling ◽

Superscalar Architectures

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VLIW compilation techniques for superscalar architectures

Lecture Notes in Computer Science - Compiler Construction ◽

10.1007/bfb0026435 ◽

1998 ◽

pp. 234-248 ◽

Cited By ~ 2

Author(s):

Esther Stümpel ◽

Michael Thies ◽

Uwe Kastens

Keyword(s):

Superscalar Architectures ◽

Compilation Techniques

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