Lattice priority scheduling: Low-overhead timing-channel protection for a shared memory controller

2016 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca.2016.7446080 ◽

2016 ◽

Cited By ~ 9

Author(s):

Andrew Ferraiuolo ◽

Yao Wang ◽

Danfeng Zhang ◽

Andrew C. Myers ◽

G. Edward Suh

Keyword(s):

Shared Memory ◽

Priority Scheduling ◽

Memory Controller ◽

Timing Channel

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Timing channel protection for a shared memory controller

2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca.2014.6835934 ◽

2014 ◽

Cited By ~ 38

Author(s):

Yao Wang ◽

Andrew Ferraiuolo ◽

G. Edward Suh

Keyword(s):

Shared Memory ◽

Memory Controller ◽

Timing Channel

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A Lightweight Timing Channel Protection for Shared Memory Controllers

2015 IEEE 24th Asian Test Symposium (ATS) ◽

10.1109/ats.2015.17 ◽

2015 ◽

Author(s):

Guopei Liu ◽

Ying Wang ◽

Sen Li ◽

Huawei Li ◽

Xiaowei Li

Keyword(s):

Shared Memory ◽

Timing Channel

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An OCM Based Shared Memory Controller for Virtex 4

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380747 ◽

2007 ◽

Author(s):

Bas Breijer ◽

Filipa Duarte ◽

Stephan Wong

Keyword(s):

Shared Memory ◽

Memory Controller

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A mixed critical memory controller using bank privatization and fixed priority scheduling

2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications ◽

10.1109/rtcsa.2014.6910550 ◽

2014 ◽

Cited By ~ 26

Author(s):

Leonardo Ecco ◽

Sebastian Tobuschat ◽

Selma Saidi ◽

Rolf Ernst

Keyword(s):

Priority Scheduling ◽

Memory Controller ◽

Fixed Priority ◽

Fixed Priority Scheduling ◽

Bank Privatization

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CovertInspector: Identification of Shared Memory Covert Timing Channel in Multi-tenanted Cloud

International Journal of Parallel Programming ◽

10.1007/s10766-015-0391-4 ◽

2015 ◽

Vol 45 (1) ◽

pp. 142-156 ◽

Cited By ~ 5

Author(s):

Sheng Wang ◽

Weizhong Qiang ◽

Hai Jin ◽

Jinfeng Yuan

Keyword(s):

Shared Memory ◽

Timing Channel ◽

Covert Timing Channel

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Design of Shared Memory Controller Device Driver in Embedded System

The Journal of the Korea institute of electronic communication sciences ◽

10.13067/jkiecs.2014.9.6.703 ◽

2014 ◽

Vol 9 (6) ◽

pp. 703-709 ◽

Cited By ~ 1

Author(s):

Ji-Hoon Moon ◽

Jae-Chul Oh

Keyword(s):

Embedded System ◽

Shared Memory ◽

Device Driver ◽

Memory Controller

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Optimization of shared memory controller for multi-core system

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology ◽

10.1109/icsict.2010.5667755 ◽

2010 ◽

Cited By ~ 1

Author(s):

Jiang-Yi Shi ◽

Ai-Nv An ◽

Kang Li ◽

Yue Hao ◽

Pei-Yan Liu ◽

...

Keyword(s):

Shared Memory ◽

Core System ◽

Memory Controller

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New hybrid priority scheduling algorithm based on a round robin with dynamic time Quantum

10.33329/jaus.19.264.14 ◽

2019 ◽

Vol 264 (1) ◽

pp. 105-109

Keyword(s):

Scheduling Algorithm ◽

Round Robin ◽

Priority Scheduling ◽

Time Quantum ◽

Dynamic Time

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Shared-memory parallel multi-target tracking

Journal of Computer Applications ◽

10.3724/sp.j.1087.2008.02303 ◽

2009 ◽

Vol 28 (9) ◽

pp. 2303-2305

Author(s):

Xiao-gang WANG ◽

Xiao-juan WU ◽

Xin ZHOU ◽

Xiao-yan ZHANG

Keyword(s):

Target Tracking ◽

Shared Memory ◽

Multi Target Tracking

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Reliable and double-blind IP covert timing channel

Journal of Computer Applications ◽

10.3724/sp.j.1087.2012.01636 ◽

2013 ◽

Vol 32 (6) ◽

pp. 1636-1639

Author(s):

Xing-xing GUAN ◽

Chang-da WANG ◽

Zhi-guo LI ◽

Zhao-jun BO

Keyword(s):

Double Blind ◽

Timing Channel ◽

Covert Timing Channel

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