Warped register file: A power efficient register file for GPGPUs

TM-RF: Aging-Aware Power-Efficient Register File Design for Modern Microprocessors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2014.2334136 ◽

2015 ◽

Vol 23 (7) ◽

pp. 1196-1209 ◽

Cited By ~ 6

Author(s):

Na Gong ◽

Jinhui Wang ◽

Shixiong Jiang ◽

Ramalingam Sridhar

Keyword(s):

Register File ◽

Power Efficient ◽

File Design

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A Power Efficient Approach to Fault-Tolerant Register File Design

21st International Conference on VLSI Design (VLSID 2008) ◽

10.1109/vlsi.2008.53 ◽

2008 ◽

Cited By ~ 1

Author(s):

Mojtaba Amiri-Kamalabad ◽

Seyed Ghassem Miremadi ◽

Mahdi Fazeli

Keyword(s):

Fault Tolerant ◽

Register File ◽

Power Efficient ◽

Efficient Approach ◽

File Design

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Application-specific power-efficient approach for reducing register file vulnerability

2011 Design, Automation & Test in Europe ◽

10.1109/date.2012.6176535 ◽

2012 ◽

Cited By ~ 5

Author(s):

H. Tabkhi ◽

G. Schirner

Keyword(s):

Specific Power ◽

Register File ◽

Power Efficient ◽

Efficient Approach ◽

Application Specific

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Power‐efficient reliable register file for aggressive‐environment applications

IET Computers & Digital Techniques ◽

10.1049/iet-cdt.2018.5047 ◽

2019 ◽

Vol 14 (1) ◽

pp. 1-8

Author(s):

Ihsen Alouani ◽

Hamzeh Ahangari ◽

Ozcan Ozturk ◽

Smail Niar

Keyword(s):

Register File ◽

Power Efficient ◽

Aggressive Environment

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Power efficient register file update approach for embedded processors

2007 25th International Conference on Computer Design ◽

10.1109/iccd.2007.4601935 ◽

2007 ◽

Cited By ~ 2

Author(s):

Raid Ayoub ◽

Alex Orailoglu

Keyword(s):

Embedded Processors ◽

Register File ◽

Power Efficient

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A power efficient register file architecture using master latch sharing

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. ◽

10.1109/iscas.2003.1206291 ◽

2003 ◽

Cited By ~ 2

Author(s):

M. Wroblewski ◽

M. Mueller ◽

A. Wortmann ◽

S. Simon ◽

W. Pieper ◽

...

Keyword(s):

Register File ◽

Power Efficient

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A 1.2V-to-0.4V 3.2GHz-to-14.3MHz Power-Efficient 3-Port Register File in 65-nm CMOS

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2016.2613282 ◽

2017 ◽

Vol 64 (2) ◽

pp. 360-372 ◽

Cited By ~ 2

Author(s):

Khawar Sarfraz ◽

Mansun Chan

Keyword(s):

Register File ◽

Power Efficient

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Determination of Adjacent Nodes for Power Efficient Wireless Sensor Networks

IEEJ Transactions on Electronics Information and Systems ◽

10.1541/ieejeiss.134.612 ◽

2014 ◽

Vol 134 (5) ◽

pp. 612-619 ◽

Cited By ~ 1

Author(s):

Kohei Kamimura ◽

Hitoshi Hayashi ◽

Takaaki Hatauchi

Keyword(s):

Wireless Sensor Networks ◽

Sensor Networks ◽

Wireless Sensor ◽

Power Efficient

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Faithfully Truncated Adder-Based Area-Power Efficient FIR Design with Predefined Output Accuracy

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.2019kep0010 ◽

2020 ◽

Vol E103.A (9) ◽

pp. 1063-1070 ◽

Cited By ~ 1

Author(s):

Jinghao YE ◽

Masao YANAGISAWA ◽

Youhua SHI

Keyword(s):

Power Efficient

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Power Efficient Routing in Mobile Adhoc Network (MANET) Using Connected Dominating Set

International Journal of Computer Sciences and Engineering ◽

10.26438/ijcse/v6i10.641649 ◽

2018 ◽

Vol 6 (10) ◽

pp. 641-649

Author(s):

B. Kalita ◽

A. K. Das ◽

A.U. Islam

Keyword(s):

Dominating Set ◽

Connected Dominating Set ◽

Power Efficient ◽

Mobile Adhoc Network ◽

Adhoc Network

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